The LTC2261-14/LTC2260-14/LTC2259-14 are sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.4dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2260-12 12 LTC2260-14 14  Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2261-12/LTC2260-12/LTC2259-12 are sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.8dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.The digital outputs can be either full-rate CMOS, double-data rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2260-12 12 LTC2260-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2261-12/LTC2260-12/LTC2259-12 are sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.8dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.The digital outputs can be either full-rate CMOS, double-data rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2261-12 12 LTC2261-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2261-14/LTC2260-14/LTC2259-14 are sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.4dB SNR and 85dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.The digital outputs can be either full-rate CMOS, doubledata rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2261-12 12 LTC2261-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2216/LTC2215 are 80Msps/65Msps sampling 16- bit A/D converters designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is fixed at 2.75VP-P.The LTC2216/LTC2215 are perfect for demanding communications applications, with AC performance that includes 81.5dBFS noise floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 85fsRMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC specs include ±3.5LSB INL, ±1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.Applications Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE

The AD9215 is a family of monolithic, single 3 V supply, 10-bit, 65/80/105 MSPS analog-to-digital converters (ADC). This family features a high performance sample-and-hold amplifier (SHA) and voltage reference. The AD9215 uses a multistage differential pipelined architecture with output error correction logic to provide 10-bit accuracy at 105 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The wide bandwidth, truly differential sample-and-hold amplifier (SHA) allows for a variety of user-selectable input ranges and offsets including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9215 is suitable for applications in communications, imaging, and medical ultrasound.A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer compensates for wide variations in the clock duty cycle while maintaining excellent performance. The digital output data is presented in straight binary or twos complement formats. An out-of-range signal indicates an overflow condition, which can be used with the MSB to determine low or high overflow.Fabricated on an advanced CMOS process, the AD9215 is available in both a 28-lead surface-mount plastic package and a 32-lead chip scale package and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS The AD9215 operates from a single 3 V power supply and features a separate digital output driver supply to accommodate 2.5 V and 3.3 V logic families. Operating at 105 MSPS, the AD9215 core ADC consumes a low 120 mW; at 80 MSPS, the power dissipation is 104 mW; and at 65 MSPS, the power dissipation is 96 mW. The patented SHA input maintains excellent performance for input frequencies up to 200 MHz and can be configured for single-ended or differential operation. The AD9215 is part of several pin compatible 10-, 12-, and 14-bit low power ADCs. This allows a simplified upgrade from 10 bits to 12 bits for systems up to 80 MSPS. The clock duty cycle stabilizer maintains converter performance over a wide range of clock pulse widths. The out of range (OR) output bit indicates when the signal is beyond the selected input range.APPLICATIONS Ultrasound equipment IF sampling in communications receivers Battery-powered instruments Hand-held scopemeters Low cost digital oscilloscopes

The AD9480 is an 8-bit monolithic analog-to-digital converter optimized for high speed, low power, small size, and ease of use. The product operates at a 250 MSPS conversion rate, with excellent linearity and dynamic performance over its full operating range.To minimize system cost and power dissipation, the AD9480 includes an internal reference and track-and-hold circuit. The user only provides a +3.3 V power supply and a differential encode clock. No external reference or driver components are required for many applications. The digital outputs are LVDS (ANSI 644) compatible with an option of twos complement or binary output format. The output data bits are provided in parallel fashion along with an LVDS output clock, which simplifies data capture.Fabricated on an advanced BiCMOS process, the AD9480 is available in a 44-pin surface mount package (TQFP) specified over the industrial temperature range (-40°C to +85°C).PRODUCT HIGHLIGHTS Superior linearity. A DNL of ±0.25 makes the AD9480 suitable for instrumentation and measurement applications. Power-down mode. A power-down function may be exercised to bring total consumption down to 15 mW. LVDS outputs (ANSI-644). LVDS outputs simplify timing and improve noise performance.APPLICATIONS Digital oscilloscopes Instrumentation and measurement Communications: Point-to-point radios Predistortion loops

The AD9600 is a dual, 10-bit, 105 MSPS/125 MSPS/150 MSPSADC. It is designed to support communications applicationswhere low cost, small size, and versatility are desired.The dual ADC core features a multistage, differential pipelinedarchitecture with integrated output error correction logic. EachADC features wide bandwidth, differential sample-and-holdanalog input amplifiers supporting a variety of user-selectableinput ranges. An integrated voltage reference eases designconsiderations. A duty cycle stabilizer is provided to compensatefor variations in the ADC clock duty cycle, allowing theconverters to maintain excellent performance.The AD9600 has several functions that simplify the automatedgain control (AGC) function in a communications receiver. Forexample, the fast detect feature allows fast overrange detectionby outputting four bits of input level information with veryshort latency.In addition, the programmable threshold detector allows monitoringthe amplitude of the incoming signal with short latency,using the four fast detect bits of the ADC. If the input signal levelexceeds the programmable threshold, the fine upper thresholdindicator goes high. Because this threshold is set from the fourMSBs, the user can quickly adjust the system gain to avoid anoverrange condition.Another AGC-related function of the AD9600 is the signalmonitor. This block allows the user to monitor the compositemagnitude of the incoming signal, which aids in setting the gainto optimize the dynamic range of the overall system.The ADC output data can be routed directly to the two external10-bit output ports. These outputs can be set from 1.8 V to 3.3 VCMOS or 1.8 V LVDS. In addition, flexible power-down optionsallow significant power savings.PRODUCT HIGHLIGHTS Integrated dual, 10-bit, 150 MSPS/125 MSPS/105 MSPS ADC. Fast overrange detect and signal monitor with serial output. Signal monitor block with dedicated serial output mode. Proprietary differential input maintains excellent SNR performance for input frequencies up to 450 MHz. The AD9600 operates from a single 1.8 V supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. A standard serial port interface supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down mode, and voltage reference mode. The AD9600 is pin compatible with the AD9627-11, AD9627, and AD9640, allowing a simple migration from 10 bits to 11 bits, 12 bits, or 14 bits.APPLICATIONS Point-to-point radio receivers (GPSK, QAM) Diversity radio systems I/Q demodulation systems Smart antenna systems Digital predistortion General-purpose software radios Broadband data applications Data acquisition Nondestructive testing

The AD9780 / AD9781 / AD9783 include pin-compatible, high dynamic range, dual digital-to-analog converters (DACs) with 12-/14-/16-bit resolutions, and sample rates of up to 500 MSPS. The devices include specific features for direct conversion transmit applications, including gain and offset compensation, and they interface seamlessly with analog quadrature modulators such as the ADL5370.A proprietary, dynamic output architecture permits synthesis of analog outputs even above Nyquist by shifting energy away from the fundamental and into the image frequency.Full programmability is provided through a serial peripheral interface (SPI) port. Some pin-programmable features are also offered for those applications without a controller.PRODUCT HIGHLIGHTS Low noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals. Proprietary switching output for enhanced dynamic performance. Programmable current outputs and dual auxiliary DACs provide flexibility and system enhancements.APPLICATIONS Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMAX Wideband communications LMDS/MMDS, point-to-point RF signal generators, arbitrary waveform generators

The AD9956 is Analog Devices’s first AgileRF synthesizer.The device is comprised of a DDS and PLL circuitry. The DDSfeatures a 14-bit DAC operating up to 400 MSPS and a 48-bitfrequency tuning word. The PLL Circuitry includes a phasedetector with scaleable 200 MHz inputs (pre-scalar inputsoperate up to 650 MHz) and digital control over the chargepump current. The device also includes a 650 MHz PECL driverwith programmable slew rates.The AD9956 uses advanced DDStechnology, an internal high-speed, high performance D/Aconverter and an advance phase-detector/charge pumpcombination to enable the synthesis of digitally-programmable,frequency-agile analog output sinusoidal waveforms up to2.7 GHz. The AD9956 is designed to provide fast frequencyhopping and fine tuning resolution (48-bit frequency tuningword). Information is loaded into the AD9956 via a serial I/Oport which has a device write speed of 25 MBit/sec. The AD9956DDS block also supports a user defined linear sweep mode ofoperation.The AD9956 is specified to operate over the extendedautomotive range of −40°C to +125°C.Applications Agile LO frequency synthesis FM chirp source for radar and scanning systems Automotive radars Test and measurement equipment Acousto-optic device drivers