The AD7228A contains eight 8-bit voltage-mode digital-to-analog converters, with output buffer amplifiers and interface logic on a single monolithic chip. No external trims are required to achieve full specified performance for the part.Separate on-chip latches are provided for each of the eight D/A converters. Data is transferred into the data latches through a common 8-bit TTL/CMOS (5 V) compatible input port. Address inputs A0, A1 and A2 determine which latch is loadedwhen WR goes low. The control logic is speed compatible withmost 8-bit microprocessors.Specified performance is guaranteed for input reference voltages from +2 to +10 V when using dual supplies. The part is also specified for single supply +15 V operation using a reference of +10 V and single supply +5 V operation using a reference of +1.23 V. Each output buffer amplifier is capable of developing+10 V across a 2 kΩ load.The AD7228A is fabricated on an all ion-implanted, high-speed, Linear Compatible CMOS (LC2MOS) process which has been specifically developed to integrate high-speed digital logic circuits and precision analog circuits on the same chip.Product Highlights Eight DACs and Amplifiers in Small Package The single-chip design of eight 8-bit DACs and amplifiers allows a dramatic reduction in board space requirements and offers increased reliability in systems using multiple converters. Its pinout is aimed at optimizing board layout with all analog inputs and outputs at one side of the package and all digital inputs at the other. Single or Dual Supply Operation The voltage-mode configuration of the DACs allows single supply operation of the AD7228A. The part can also be operated with dual supplies giving enhanced performance for some parameters. Microprocessor Compatibility The AD7228A has a common 8-bit data bus with individual DAC latches, providing a versatile control architecture for simple interface to microprocessors. All latch enable signals are level triggered and speed compatible with most high performance 8-bit microprocessors.

The AD7609 is an 18-bit, 8-channel, true differential, simultaneous sampling analog-to-digital data acquisition system (DAS). The part contains analog input clamp protection, a second-order antialiasing filter, a track-and-hold amplifier, an 18-bit charge redistribution successive approximation analog-to-digital converter (ADC), a flexible digital filter, a 2.5 V reference and reference buffer, and high speed serial and parallel interfaces.The AD7609 operates from a single 5 V supply and can accommodate ±20 V and ±10 V true bipolar differential input signals while sampling at throughput rates up to 200 kSPS for all channels. The input clamp protection circuitry can tolerate voltages up to ±16.5 V on each analog input pin. The AD7609 has 1 MΩ analog input impedance regardless of sampling frequency. The single supply operation, on-chip filtering, and high input impedance eliminate the need for driver op amps and external bipolar supplies. The AD7609 antialiasing filter has a −3 dB cutoff frequency of 32 kHz and provides 40 dB antialias rejection when sampling at 200 kSPS. The flexible digital filter is pin driven, yields improvements in SNR, and reduces the −3 dB bandwidth. Applications Power line monitoring and protection systems Multiphase motor control Instrumentation and control systems Multiaxis positioning systems Data acquisition systems (DAS)

The AD7988-1/AD7988-5 are 16-bit, successive approximation,analog-to-digital converters (ADC) that operate from a singlepower supply, VDD. The AD7988-1 offers a 100 kSPS throughput,and the AD7988-5 offers a 500 kSPS throughput. They are lowpower, 16-bit sampling ADCs with a versatile serial interfaceport. On the CNV rising edge, they sample an analog input,IN+, between 0 V to VREF with respect to a ground sense, IN−.The reference voltage, REF, is applied externally and can be setindependent of the supply voltage, VDD.The SPI-compatible serial interface also features the ability todaisy-chain several ADCs on a single 3-wire bus using the SDIinput. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic usingthe separate supply, VIO.The AD7988-1/AD7988-5 generics are housed in a 10-leadMSOP or a 10-lead LFCSP with operation specified from −40°Cto +125°C.Applications Automated test equipment Data acquisition systems Medical instruments Machine automation

The AD9250 is a dual, 14-bit ADC with sampling speeds of up to 250 MSPS. The AD9250 is designed to support communications applications where low cost, small size, wide bandwidth, and versatility are desired.The ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. The ADC cores feature wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. The JESD204B high speed serial interface reduces board routing requirements and lowers pin count requirements for the receiving device.By default, the ADC output data is routed directly to the two JESD204B serial output lanes. These outputs are at CML voltage levels. Four modes support any combination of M = 1 or 2 (single or dual converters) and L = 1 or 2 (one or two lanes). For dual ADC mode, data can be sent through two lanes at the maximum sampling rate of 250 MSPS. However, if data is sent through one lane, a sampling rate of up to 125 MSPS is supported. Synchronization inputs (SYNCINB± and SYSREF±) are provided.Flexible power-down options allow significant power savings, when desired. Programmable overrange level detection is supported for each channel via the dedicated fast detect pins.Programming for setup and control are accomplished using a 3-wire SPI-compatible serial interface.The AD9250 is available in a 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.Product Highlights Integrated dual, 14-bit, 170 MSPS/250 MSPS ADC. The configurable JESD204B output block supports up to 5 Gbps per lane. An on-chip, phase-locked loop (PLL) allows users to provide a single ADC sampling clock; the PLL multiplies the ADC sampling clock to produce the corresponding JESD204B data rate clock. Support for an optional RF clock input to ease system board design. Proprietary differential input maintains excellent SNR performance for input frequencies of up to 400 MHz. Operation from a single 1.8 V power supply. Standard serial port interface (SPI) that supports various product features and functions such as controlling the clock DCS, power-down, test modes, voltage reference mode, over range fast detection, and serial output configuration.Applications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM, EDGE, LTE DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers I/Q demodulation systems Smart antenna systems Electronic test and measurement equipment Radar receivers COMSEC radio architectures IED detection/jamming systems General-purpose software radios Broadband data applications

The AD9257 is an octal, 14-bit, 40 MSPS and 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9257 is available in an RoHS-compliant, 64-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent. APPLICATIONS Medical imaging and nondestructive ultrasound Portable ultrasound and digital beam-forming systems Quadrature radio receivers Diversity radio receivers Optical networking Test EquipmentPRODUCT HIGHLIGHTS Small Footprint. Eight ADCs are contained in a small, space-saving package. Low Power of 55 mW/Channel at 65 MSPS with Scalable Power Options. Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 455 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. Pin Compatible with the AD9637 (12-Bit Octal ADC).

The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The part operates at up to a 500 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a sample-and-hold and voltagereference, are included on the chip to provide a complete signal conversion solution. The VREF pin can be used to monitor the internal reference or provide an external voltage reference (external reference mode must be enabled through the SPI port). The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced BiCMOS process, the AD9434 isavailable in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C). This part is protected under a U.S. patent.APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearizationPRODUCT HIGHLIGHTS High Performance. Maintains 65 dBFS SNR at 500 MSPS with a 250 MHz input. Low Power. Consumes only 660 mW at 500 MSPS. Ease of Use. LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample and hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design. Serial Port Control. Standard serial port interface supports various product functions, such as data formatting, power-down, gain adjust, and output test pattern generation. The AD9434 is pin compatible with the AD9230, and can be substituted in many applications with minimal design changes.

The AD9634 is a 12-bit, analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. The AD9634 is designed to support communications applications where low cost, small size, wide bandwidth, and versatility are desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.The ADC output data are routed directly to the external 12-bit LVDS output port.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire, SPI-compatible serial interface.The AD9634 is available in a 32-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Integrated 12-bit, 170 MSPS/210 MSPS/250 MSPS ADC. Fast overrange and threshold detect. Proprietary differential input maintains excellent SNR performance for input frequencies up to 350 MHz. 3-pin, 1.8V SPI port for register programming and readback. Pin compatibility with the AD9642, allowing a simple migration up to 14 bits, and with the AD6672. APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Ultrasound equipment Broadband data applications

The AD9634 is a 12-bit, analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. The AD9634 is designed to support communications applications where low cost, small size, wide bandwidth, and versatility are desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.The ADC output data are routed directly to the external 12-bit LVDS output port.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire, SPI-compatible serial interface.The AD9634 is available in a 32-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Integrated 12-bit, 170 MSPS/210 MSPS/250 MSPS ADC. Fast overrange and threshold detect. Proprietary differential input maintains excellent SNR performance for input frequencies up to 350 MHz. 3-pin, 1.8V SPI port for register programming and readback. Pin compatibility with the AD9642, allowing a simple migration up to 14 bits, and with the AD6672. APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Ultrasound equipment Broadband data applications

The AD9642 is a 14-bit analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. The AD9642 is designed to support communications applications, where low cost, small size, wide bandwidth, and versatility are desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.The ADC output data is routed directly to the external 14-bit LVDS output port.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9642 is available in a 32-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent. APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Ultrasound equipment Broadband data applicationsPRODUCT HIGHLIGHTS Integrated 14-bit, 170 MSPS/210 MSPS/250 MSPS ADC. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating LVDS outputs. Proprietary differential input maintains excellent SNR performance for input frequencies of up to 350 MHz. 3-pin, 1.8 V SPI port for register programming and readback. Pin compatibility with the AD9634, allowing a simple migration from 14 bits to 12 bits, and with the AD6672.

The AD9683 is a 14-bit ADC with sampling speeds of up to250 MSPS. The AD9683 supports communications applicationswhere low cost, small size, wide bandwidth, and versatility aredesired.The ADC core features a multistage, differential pipelinedarchitecture with integrated output error correction logic. TheADC core features wide bandwidth inputs supporting a varietyof user-selectable input ranges. An integrated voltage referenceeases design considerations. A duty cycle stabilizer (DCS) isprovided to compensate for variations in the ADC clock duty cycle,allowing the converter to maintain excellent performance. TheJESD204B high speed serial interface reduces board routingrequirements and lowers pin count requirements for thereceiving device.The ADC output data is routed directly to the JESD204B serialoutput lane. These outputs are at CML voltage levels. Data can besent through the lane at the maximum sampling rate of 250 MSPS,which results in a lane rate of 5 Gbps. Synchronization inputs(SYNCINB± and SYSREF±) are provided.Flexible power-down options allow significant power savings,when desired. Programmable overrange level detection issupported via the dedicated fast detect pins.Programming for setup and control is accomplished using a3-wire SPI-compatible serial interface.The AD9683 is available in a 32-lead LFCSP and is specifiedover the industrial temperature range of −40°C to +85°C.Product Highlights Integrated 14-bit, 170 MSPS/250 MSPS ADC. The configurable JESD204B output block supports lane rates up to 5 Gbps. An on-chip, phase-locked loop (PLL) allows users to provide a single ADC sampling clock; the PLL multiplies the ADC sampling clock to produce the corresponding JESD204B data rate clock. Support for an optional radio frequency (RF) clock input to ease system board design. Proprietary differential input maintains excellent SNR performance for input frequencies of up to 400 MHz. Operation from a single 1.8 V power supply. Standard serial port interface (SPI) that supports various product features and functions, such as controlling the clock DCS, power-down, test modes, voltage reference mode, overrange fast detection, and serial output configuration.Applications Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM, EDGE, LTE DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers Smart antenna systems Electronic test and measurement equipment Radar receivers COMSEC radio architectures IED detection/jamming systems General-purpose software radios Broadband data applications Ultrasound equipment