Data Conversion IC Development Tools LTC2273CUJ 16-bit, 80Msps Serial ADC, 70MHz < Ain < 140MHz, req. DC890

Dual, 12-Bit nanoDAC with I2C Interface Features: AD5627R/AD5647R/AD5667R 12-/14-/16-bit On-chip 1.25 V/2.5 V, 5 ppm/°C reference AD5627/AD5667 12-/16-bit External reference only 3 mm x 3 mm LFCSP and 10-lead MSOP 2.7 V to 5.5 V power supply Low power, smallest pin-compatible, dual nanoDACs Guaranteed monotonic by design Power-on reset to zero scale Per channel power-down Hardware LDAC and CLR functions I2C-compatible serial interface supports standard (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes

12-bit Digital-to-Analog Converters, with Zener Reference Features: Single Chip Construction Very High Speed Settling to 1/2 LSB AD565A: 250 ns max Full-Scale Switching Time: 30 ns Guaranteed for Operation with ±12 V (AD565A) Supplies Low Cost Linearity Guaranteed Over temperature 1/2 LSB max (K, T Grades) Monotonicity Guaranteed Over temperature Low Power = 225mW max Use with On-Board High Stability Reference

Quad, 16-Bit nanoDAC with 5ppm/C On-Chip Reference Features: Low power, smallest pin-compatible, quad nanoDACs  AD5664R: 16 bits AD5644R: 14 bits AD5624R: 12 bits User selectable external or internal reference External reference default On-chip 1.25 V/2.5 V, 5 ppm/°C reference 10-lead MSOP; 10-lead, 3 mm × 3 mm LFCSP_WD; and 12-ball, 1.665 mm × 2.245 mm WLCSP 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to zero scale Per channel power-down Serial interface, up to 50 MHz

Octal, 16-Bit nanoDAC+ with 2 ppm/C Reference, I2CInterface Features: High Performance High relative accuracy (INL): ±3 LSB maximum at 16 bits Total unadjusted error (TUE): ±0.14% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.06% of FSR maximum Low drift 2.5 V reference: 2 ppm/°C typical Wide Operating Ranges −40°C to +125°C temperature range 2.7 V to 5.5 V power supply Easy Implementation User selectable gain of 1 or 2 (GAIN pin/bit) 1.8 V logic compatibility 400 kHz I2C-compatible serial interface 20-lead, RoHS-compliant TSSOP and LFCSP

16-Channel, 12-/16-BitnanoDAC+ with 2 ppm/C VoltageReference Temperature Coefficient, SPI Interface Features: High performance High relative accuracy (INL): ±4 LSB maximum at 16 bits (AD5679/AD5679R) TUE: ±0.14% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.06% of FSR maximum Low drift, 2.5 V voltage reference temperature coefficient: 2 ppm/°C typical 40 mA short-circuit current Wide operating ranges −40°C to +125°C temperature range 2.7 V to 5.5 V power supply range Simplified implementation User selectable gain of 1 or 2 (GAIN pin) 1.8 V logic compatibility 50 MHz serial peripheral interface (SPI) with readback or daisy chain 28-lead, 4 mm × 4 mm, RoHS compliant LFCSP

16-Channel, 12-/16-BitnanoDAC+ with 2 ppm/C VoltageReference Temperature Coefficient, SPI Interface Features: High performance High relative accuracy (INL): ±4 LSB maximum at 16 bits (AD5679/AD5679R) TUE: ±0.14% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.06% of FSR maximum Low drift, 2.5 V voltage reference temperature coefficient: 2 ppm/°C typical 40 mA short-circuit current Wide operating ranges −40°C to +125°C temperature range 2.7 V to 5.5 V power supply range Simplified implementation User selectable gain of 1 or 2 (GAIN pin) 1.8 V logic compatibility 50 MHz serial peripheral interface (SPI) with readback or daisy chain 28-lead, 4 mm × 4 mm, RoHS compliant LFCSP

12-Bit Current Output, Microprocessor-Compatible DAC Features:Single chip construction Double buffered latch for 8-bit P-compatibility Fast settling time: 500 ns max to 1/2 LSB High stability buried Zener reference on chip Monotinicity guaranteed over temperature Linearity guaranteed over temperature: LSB max (AD567K) Guaranteed for operation with 12 V or 15 V supplies See Data Sheet for Additional Information

Quad, 12-Bit nanoDAC+ with SPI Interface Features: High relative accuracy (INL): ±1 LSB maximum @ 12 bits Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility 50 MHz SPI with readback or daisy chain Low glitch: 0.5 nV-sec Low power: 1.8 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range

Dual 12-Bit nanoDAC+ with 2 ppm/C Reference, I2C Interface Features: Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of full-scale range (FSR) maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility Low glitch: 0.5 nV-sec 400 kHz I2C-compatible serial interface Low power: 3.3 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range