The AD9648 is a monolithic, dual-channel, 1.8 V supply, 14-bit, 105 MSPS/125 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Output logic levels of 1.8 V CMOS or LVDS are supported. Output data can also be multiplexed onto a single output bus.The AD9648 is available in a 64-lead RoHS compliant LFCSP and is specified over the industrial temperature range (?40?C to +85?C). Applications Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Broadband data applications Battery-powered instruments Hand held scope meters Portable medical imaging Ultrasound Radar/LIDARProduct Highlights The AD9648 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or LVDS logic families. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/data timing and offset adjustments. The AD9648 is packaged in a 64-lead RoHS compliant LFCSP that is pin compatible with the AD9650/AD9269/AD9268 16-bit ADC?s, the AD9258 14-bit ADC, the AD9628/AD9231 12-bit ADC?s, and the AD9608/AD9204 10-bit ADC?s, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.

Quad-Channel, Software Configurable Input and Output Features: Quad-channel software configurable input/output circuit Screw terminals tolerant to ±40 V dc Line protectors to block power from the screw terminals to supplies User configurable modes Voltage input Current input Voltage output Current output Digital input RTD measurement Internal 16-bit, Σ- ADC with optional 50 Hz and 60 Hz rejection 13-bit monotonic DACs Charge pump for true zero voltage output HART-compatible Internal temperature sensor, ±5°C accuracy On-chip diagnostics including open circuit and short-circuit detection SPI-compatible Temperature range: −40°C to +105°C 64-lead LFCSP

DA CONVERTOR;

The 12-channel AD8802 / AD8804 provides independent digitally-controllable voltage outputs in a compact 20-lead package. This potentiometer divider TrimDAC® allows replacement of the mechanical trimmer function in new designs. The AD8802 / AD8804 is ideal for dc voltage adjustment applications.Easily programmed by serial interfaced microcontroller ports, the AD8802 with its midscale preset is ideal for potentiometer replacement where adjustments start at a nominal value. Applications such as gain control of video amplifiers, voltage controlled frequencies and bandwidths in video equipment, geometric correction and automatic adjustment in CRT computer graphic displays are a few of the many applications ideally suited for these parts. The AD8804 provides independent control of both the top and bottom end of the potentiometer divider allowing a separate zero-scale voltage setting determined by the VREFL pin. This is helpful for maximizing the resolution of devices with a limited allowable voltage control range.Internally the AD8802/AD8804 contains 12 voltage-output digital-to-analog converters, sharing a common reference-voltage input.Each DAC has its own DAC latch that holds its output state. These DAC latches are updated from an internal serial-to-parallel shift register that is loaded from a standard 3-wire serial input digital interface. The serial-data-input word is decoded where the first 4 bits determine the address of the DAC latches to be loaded with the last 8 bits of data. The AD8802/ AD8804 consumes only 10 µA from 5 V power supplies. In addition, in shutdown mode reference input current consumption is also reduced to 10 µA while saving the DAC latch settings for use after return to normal operation.The AD8802 / AD8804 is available in the 20-pin plastic DIP, the SOIC-20 surface mount package, and the 1 mm thin TSSOP-20 package.APPLICATIONS Automatic Adjustment Trimmer Replacement Video and Audio Equipment Gain and Offset Adjustment Portable and Battery Operated Equipment

Dual 14 bit 3Gsps ADC w/JESD204B

DC572A: Demo Board for the LTC1592 16-Bit SoftSpan DACs with Programmable Output Range.

Complete 12-Bit, 10.0 MSPS Monolithic A/D Converter Features: Monolithic 12-Bit A/D Converter Product Family Family Members are: AD9221, AD9223, and AD9220 Flexible Sampling Rates: 1.5 MSPS, 3.0 MSPS, and 10 MSPS Low Power Dissipation: 59 mW, 100 mW, and 250 mW Single +5 V Supply Integral Nonlinearity Error: 0.5 LSB Differential Nonlinearity Error: 0.3 LSB 70 dB SNR and 86 dB SFDR Out-of-Range Indicator 28-SOIC and 28-SSOP

The AD9083 is a 16-channel, 125 MHz bandwidth, continuous time ?-? (CTSD) ADC. The device features an on-chip, programmable, single-pole antialiasing filter and termination resistor that is designed for low power, small size, and ease of use. The 16 ADC cores features a first-order, CTSD modulator architecture with integrated, background nonlinearity correction logic and self cancelling dither. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. Each ADC has a signal processing tile to filter out of band shaped noise from the ?-? ADC and reduce the sample rate. Each tile contains a cascaded integrator comb (CIC) filter, a quadrature digital downconverter (DDC) with multiple finite input response (FIR) decimation filters (decimate by J block), or up to three quadrature DDC channels with averaging decimation filters for data gating applications. Users can configure the Subclass 1 JESD204B based, high speed serialized output in a variety of lane configurations (up to four), depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, TRIG?, and SYNCINB? input pins. The AD9083 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V capable 3-wire serial port interface (SPI). The AD9083 is available in a Pb-free, 100-ball CSP_BGA and is specified over the ?40?C to +85?C industrial temperature range.This product is protected by a US patent.APPLICATIONS Millimeter wave imaging Electronic beam forming and phased arrays Multichannel wideband receivers Electronic support measuresPRODUCT HIGHLIGHTS Continuous time, ?-? analog-to-digital converters (ADCs) support signal bandwidths of up to 125 MHz with low power and minimal filtering. Integrated digital processing blocks reduce data payload and lower overall system cost. Configurable JESD204B interface reduces printed circuit board (PCB) complexity. Flexible power-down options. SPI interface controls various product features and functions to meet specific system requirements. Small, 9 mm ? 9 mm, 100-ball CSP_BGA package, simple interface, and integrated digital processing save PCB space.

2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-Bit nanoDAC in 10-lead LFCSP, 16-lead 3 mm x 3 mm LFCSP, and 16-lead TSSOP Features: 12-/16-bit resolution 1 LSB INL 11.8 nV/√Hz noise spectral density 1 μs settling time 1.1 nV-sec glitch energy 0.05 ppm/°C temperature drift 5 kV HBM ESD classification See data sheet for additional features Also available in16-lead TSSOP

The AD7688 is a 16-bit, 500 kSPS, charge redistribution successive-approximation Analog-to-Digital Converter which operates from a single 5V power supply, VDD. It contains a very low power high-speed 16-bit sampling ADC with no missing codes, an internal conversion clock and a versatile serial interface port. The part also contains a low noise, wide bandwidth, very short aperture delay track/hold circuit. On the CNV rising edge, it samples the voltage difference between IN+ and IN- pins. The voltages on these pins usually swing in opposite phase between 0 V to REF. The reference voltage REF is applied externally and can be set up to the supply voltage.Its power scales linearly with throughput.The SPI compatible serial interface also features the ability, using the SDI input, to ?Daisy chain? several ADCs on a single 3 wire bus and provides an optional Busy indicator. It is compatible with 1.8 V, 2.5 V, 3 V or 5 V logic using the separate supply VIO.The AD7688 is housed in a 10-lead ?SOIC or 10-lead QFN (Chip Scale package) with operationAPPLICATIONS Battery Powered Equipment Medical instruments Mobile communications Personal digital assistants Data Acquisition Instrumentation Medical Instruments Process Control