2.5 V/3.3 V, 16-Bit, 2-Port Level Translating, Bus Switch Features:225 ps Propagation Delay through the Switch 4.5 Ω Switch Connection between Ports Data Rate 1.244 Gbps 2.5 V/3.3 V Supply Operation Selectable Level Shifting/Translation Small Signal Bandwidth 610 MHzLevel Translation 3.3 V to 2.5 V 3.3 V to 1.8 V 2.5 V to 1.8 V 38-Lead TSSOP Package

Encoders, Decoders, Multiplexers & Demultiplexers 2:1 Mux w/half rate clock

Translation - Voltage Levels 1.65V TO 3.6V, Uni-Direct LT I.C.

13 Gbps, Fast Rise Time AND/NAND/OR/NOR Gate, with Programmable Output Voltage Features: Supports High Data Rates: up to 13 Gbps Differential & Single-Ended Ouputs Fast Rise & Fall Times: 19 / 18 ps Low Power Consumption: 230 mW typ. Single Supply: -3.3V Programmable Differential Output Voltage Swing: 600 - 1100 mV Propagation Delay: 95 ps 16 Lead Ceramic 3 × 3mm SMT Package: 9mm2;

The AD632 is an internally trimmed monolithic four-quadrant multiplier/divider. The AD632B has a maximum multiplying error of ±0.5% without external trims.Excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried zener reference preserve accuracy even under adverse conditions. The simplicity and flexibility of use provide an attractive alternative approach to the solution of complex control functions.The AD632 is pin-for-pin compatible with the industry standard AD532 with improved specifications and a fully differential high impedance Z-input. The AD632 is capable of providing gains of up to X10, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. The AD632 can be effectively employed as a variable gain differential inputamplifier with high common-mode rejection. The effectiveness of the variable gain capability is enhanced by the inherent low noise of the AD632: 90 µV rms.APPLICATIONS High quality analog signal processing Differential ratio and percentage computations Algebraic and trigonometric function synthesis Accurate voltage controlled oscillators and filtersPRODUCT HIGHLIGHTS Guaranteed performance over temperature. The AD632A and AD632B are specified for maximum multiplying errors of ±1.0% and ±0.5% of full scale, respectively, at +25°C and are rated for operation from −25°C to +85°C. Maximum multiplying errors of ±2.0% (AD632S) and ±1.0% (AD632T) are guaranteed over the extended temperature range of −55°C to +125°C. High reliability. The AD632S and AD632T series are available with MIL-STD-883 Level B screening. All devices are available in either the hermetically sealed TO-100 metal can or ceramic DIP package.

The ADG3233 is a bypass switch designed on a submicron process which operates from supplies as low as1.65 V. The device is guaranteed for operation over the supply range 1.65 V to 3.6 V. It operates from two supplyvoltages allowing bidirectional level translation, that is. it translates low voltages to higher voltages and vice versa.The signal path is unidirectional, meaning data may only flow from A to Y.This type of device may be used in applications that require a bypassing function. It is ideally suited tobypassing devices in a JTAG chain or bypassing devices in a daisy-chain loop. One switch could be used for eachdevice or a number of devices, thus allowing easy bypassing of one or more devices in a chain. This may beparticularly useful in reducing the time overhead in testing devices in the JTAG chain or in daisy-chain applicationswhere the user does not wish to change the settings of a particular device. The bypass switch is packaged in two of the smallest footprints available for its required pin count. The 8-leadSOT-23 package requires only 2.9 mm x 2.8 mm board space, while the MSOP package occupies approximately3 mm x 4.9 mm board area.

The ADL5391 draws on three decades of experience in advanced analog multiplier products. It provides the same general mathematical function that has been field proven to provide an exceptional degree of versatility in function synthesis:VW = α × (VX x VY)/1 V + VZThe most significant advance in the ADL5391 is the use of anew multiplier core architecture, which differs markedly fromthe conventional form that has been in use since 1970. Theconventional structure that employs a current mode, translinearcore is fundamentally asymmetric with respect to the X and Yinputs, leading to relative amplitude and timing misalignmentsthat are problematic at high frequencies. The new multiplier coreeliminates these misalignments by offering symmetric signalpaths for both X and Y inputs. The Z input allows a signal to beadded directly to the output. This can be used to cancel a carrieror to apply a static offset voltage.The fully differential X, Y, and Z input interfaces are operationalover a ±2 V range, and they can be used in single-ended fashion.The user can apply a common mode at these inputs to varyfrom the internally set VPOS/2 down to ground. If these inputsare ac-coupled, their nominal voltage will be VPOS/2. These inputinterfaces each present a differential 500 Ω input impedance up toapproximately 700 MHz, decreasing to 50 Ω at 2 GHz. The gainscaling input, GADJ, can be used for fine adjustment of the gainscaling constant (α) about unity.The differential output can swing ±2 V about the VPOS/2common-mode and can be taken in a single-ended fashion aswell. The output common mode is designed to interface directlyto the inputs of another ADL5391. Light dc loads can be groundreferenced; however, ac-coupling of the outputs is recommendedfor heavy loads.The ENBL pin allows the ADL5391 to be disabled quickly to astandby mode. It operates off supply voltages from 4.5 V to 5.5 Vwhile consuming approximately 130 mA.The ADL5391 is fabricated on Analog Devices, Inc. proprietary,high performance, 65 GHz, SOI complementary, SiGe bipolarIC process. It is available in a 16-lead, RoHS compliant, LFCSPand operates over a −40°C to +85°C temperature range.Evaluation boards are available.Applications Wideband multiplication and summing High frequency analog modulation Adaptive antennas (diversity/phased array) Square-law detectors and true rms detectors Accurate polynomial function synthesis DC capable VGA with very fast control

The ADG3300 is a bidirectional logic level translator that contains eight bidirectional channels. It can be used in multivoltage digital system applications such as data transfer between a low voltage DSP/controller and a higher voltage device. The internal architecture allows the device to perform bidirectional logic level translation without an additional signal to set the direction of the translation.The voltage applied to VCCA sets the logic levels on the A side of the device, while VCCY sets the levels on the Y side. For proper operation, VCCA must always be less than VCCY. The VCCA-compatible logic signals applied to the A side of the device appear as VCCY-compatible levels on the Y side. Similarly, VCCY-compatible logic levels applied to the Y side of the device appear as VCCA-compatible logic levels on the A side.The enable pin provides three-state operation of the Y side pins. When the enable pin (EN) is pulled low, the A1 to A8 pins are internally pulled down by 6 kΩ resistors, while the Y terminals are in the high impedance state. The EN pin is referred to VCCA supply voltage and driven high for normal operation.The ADG3300 is available in a compact 20-lead TSSOP package, and it is guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and extended −40°C to +85°C temperature range.PRODUCT HIGHLIGHTS Bidirectional level translation. Fully guaranteed over the 1.15 V to 5.5 V supply range. No direction pin. 20-lead TSSOP package.APPLICATIONS Low Voltage ASIC Level Translation Smart Card Readers Cell Phones and Cell Phone Cradles Portable Communications Devices Telecommunications Equipment Network Switches and Routers Storage Systems (SAN/NAS) Computing/Server Applications GPS Portable POS Systems Low Cost Serial Interfaces

The ADG3308-1 is a bidirectional level translator containing eight bidirectional channels. They can be used in multivoltage digital system applications such as a data transfer between a low voltage DSP controller and a higher voltage device. The internal architecture allows the device to perform bidirectional level translation without an additional signal to set the direction in which the translation takes place.The voltage applied to VCCA sets the logic levels on the A side of the device, and VCCY sets the levels on the Y side. For proper operation, VCCA must always be less than VCCY. The VCCA-compatible logic signals applied to the A side of the device appear as VCCY-compatible levels on the Y side. Similarly, VCCY-compatible logic levels applied to the Y side of the device appear as VCCA-compatible logic levels on the A side.The enable pin (EN) provides three-state operation on both the A side and the Y side pins. When the EN pin is pulled low, the terminals on both sides of the device are in the high impedance state. For normal operation, EN should be driven high.The ADG3308-1 is available in a 20-ball WLCSP. The EN pin is referred to the VCCA supply voltage.The ADG3308-1 guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and the extended −40°C to +85°C temperature range.Product Highlights Bidirectional logic level translation. Fully guaranteed over the 1.15 V to 5.5 V supply range. No direction pin. Packages: 20-ball WLCSP.Applications Low voltage ASIC level translation Smart card readers Cell phones and cell phone cradles Portable communication devices Telecommunications equipment Network switches and routers Storage systems (SAN/NAS) Computing/server applications GPS Portable POS systems Low cost serial interfaces

The ADG3308 is a bidirectional level translator containing eight bidirectional channels. The ADG3308 can be used in multivoltage digital system applications, such as a data transfer between a low voltage DSP controller and a higher voltage device. The internal architecture allows the device to perform bidirectional level translation without an additional signal to set the direction in which the translation takes place.The voltage applied to VCCA sets the logic levels on the A side of the device, and VCCY sets the levels on the Y side. For proper operation, VCCA must always be less than VCCY. The VCCA compatible logic signals applied to the A side of the device appear as VCCY compatible levels on the Y side. Similarly, VCCY compatible logic levels applied to the Y side of the device appear as VCCA compatible logic levels on the A side.The enable pin (EN) provides three-state operation on both the A side and the Y side pins. When the EN pin is pulled low, the terminals on both sides of the device are in the high impedance state. For normal operation, EN should be driven high.The ADG3308 is available in a compact 20-lead TSSOP and a 20-lead LFCSP. The EN pin is referred to the VCCY supply voltage. The ADG3308 is guaranteed to operate over the 1.15 V to 5.5 V supply voltage range and the extended −40°C to +85°C temperature range.Product Highlights Bidirectional logic level translation. Fully guaranteed over the 1.15 V to 5.5 V supply range. No direction pin. Packages: 20-lead TSSOP and 20-lead LFCSPApplications Low voltage ASIC level translation Smart card readers Cell phones and cell phone cradles Portable communication devices Telecommunications equipment Network switches and routers Storage systems (SAN/NAS) Computing/server applications GPS Portable POS systems Low cost serial interfaces