The ADSP-BF525C offers up to 600 MHz performance and up to 1200 MMACs. This processor core is supported by an advanced DMA controller supporting one-and two-dimensional DMA transfers between on-chip memory, off-chip memory, and system peripherals. The combination of the processor core speed and the DMA controller allows for efficient processing of audio, voice, video, and image data.The ADSP-BF525C provides peripheral flexibility to complement its high performance processing. The HS USB OTG host direct memory access (HDMA) and NAND flash controller are just a few of the peripheral options on the ADSP-BF525C family—not to mention the availability of up to 48 GPIO ports.For applications where product differentiation represents a challenge for securing market leadership, the ADSP-BF525C enables developers to provide features and benefits to augment their product offerings without compromising cost or power. The scalability of the ADSP-BF525C makes it an ideal candidate for Premium Audio Players where differentiation of features can be realized without sacrificing system cost. Where the diversity of Multimedia applications and content security are key attributes the ADSP-BF525C provides processing flexibility and Lockbox™ Secure Technology to enable users to develop freely and without bounds.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF525C provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.For space constrained audio applications the ADSP-BF525C supports an embedded low power stereo audio CODEC.

The high performance 16/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the dynamic power management (DPM) functionality allow system designers a flexible platform to address a wide range of portable applications, including consumer, communications and industrial/instrumentation.With the combination of peripherals which enable glue-less connectivity to networked devices such as Ethernet or WiFi 802.11 a/b/g modules and power efficient signal processing, the ADSP-BF527 is well suited to IP connected applications such as VoIP Phone or IP Camera.The VoIP challenge to the embedded-system designer is to choose a processing solution that is cost-effective, easy to deploy and scaleable in performance across market spaces. A “sweet spot” embedded-solution approach is to design with a platform that can implement a low channel count basic VoIP solution, yet retain sufficient capacity for value added capabilities and services – such as video, music, imaging and system control. Unlike traditional VoIP embedded solutions that utilize two processor cores to provide VoIP functionality, the ADSP-BF527 provides a convergent solution in a unified core architecture that allows voice and video signal processing concurrent with RISC MCU processing to handle network and user-interface demands. This unique ability to offer full VoIP functionality on a single convergent processor provides for a unified software development environment, faster system debugging and deployment, and lower overall system cost.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF527 provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.

The ADSP-BF533 provides a high performance, power-efficient processor choice for today's most demanding convergent signal processing applications. The high performance 16-bit/32-bit Blackfin® embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the dynamic power management (DPM) functionality allow system designers a flexible platform to address a wide range of applications including consumer,communications, automotive, and industrial/instrumentation.Architectural Features High performance 16-bit/32-bit embedded processor core 10-stage RISC MCU/DSP pipeline with mixed 16-bit/32-bit ISA for optimal code density Full SIMD architecture, including instructions for accelerated video and image processing Memory management unit (MMU) supporting full memory protection for an isolated and secure environmentHigh Level of Integration Up to 148 kB of on-chip SRAM Glueless video capture and display port Two dual-channel, full-duplex, synchronous serial ports supporting eight stereo I2S channels 12 DMA channels supporting one- and two-dimensional data transfers Memory controller providing glueless connection to multiple banks of external SDRAM, SRAM, Flash, or ROM 160-ball mini-BGA, 169-ball PBGA packages Industrial temperature ranges (40°C to 85°C) and commercial temperature ranges (0°C to 70°C) available

The ADSP-BF533 provides a high performance, power-efficient processor choice for today's most demanding convergent signal processing applications. The high performance 16-bit/32-bit Blackfin® embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the dynamic power management (DPM) functionality allow system designers a flexible platform to address a wide range of applications including consumer,communications, automotive, and industrial/instrumentation.Architectural Features High performance 16-bit/32-bit embedded processor core 10-stage RISC MCU/DSP pipeline with mixed 16-bit/32-bit ISA for optimal code density Full SIMD architecture, including instructions for accelerated video and image processing Memory management unit (MMU) supporting full memory protection for an isolated and secure environmentHigh Level of Integration Up to 148 kB of on-chip SRAM Glueless video capture and display port Two dual-channel, full-duplex, synchronous serial ports supporting eight stereo I2S channels 12 DMA channels supporting one- and two-dimensional data transfers Memory controller providing glueless connection to multiple banks of external SDRAM, SRAM, Flash, or ROM 160-ball mini-BGA, 169-ball PBGA packages Industrial temperature ranges (40°C to 85°C) and commercial temperature ranges (0°C to 70°C) available

The Blackfin® Processor family has been expanded to address the ever-increasing need for more connection possibilities. This connectivity is coupled with the high performance 16-/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the Dynamic Power Management (DPM) functionality. System designers can take advantage of the combined control and signal processing capabilities of the processor core across a wide range of end applications through code compatibility of these new family members with existing Blackfin offerings.The ADSP-BF538F processors are a functional extension of the popular ADSP-BF533 processor, and they are ideally suited for applications with multiple device connections. The ADSP-BF538F is equivalent in functionality to the ADSP-BF538 processor with the exception of the addition of onboard FLASH memory. Ideally suited for a broad range of industrial, instrumentation and medical appliance applications—allowing for broad connection possibilities coupled with a mix of control and signal processing needs based on the end product. Designed for Embedded DevelopmentA new addition to the Blackfin Processor family is the inclusion of integrated FLASH memory alongside the processor. There are two choices available in the ADSP-BF538F family, one with 512KB of onboard FLASH memory and one with 1MB of onboard FLASH memory. Both offer large code space for complex embedded systems and fast access time to the Blackfin core. This is in addition to the complementary Blackfin processor memory system that offers a powerful and flexible cache architecture that can dynamically balance between the hard real-time tasks desired in SRAM and soft real-time control tasks and an Operating System (OS) requiring cache functionality. FLASH Memory Data Sheets:4 Megabit (512 K x 8-Bit/256 K x 16-Bit) FLASH memory8 Megabit (1 M x 8-Bit/512 K x 16-Bit) FLASH memory Dynamic Power Management additionally lowers power consumption for extending battery life or for minimizing power dissipation in enclosed applications. Designed as an Integrated SystemIn addition to the embedded connectivity of CAN, the ADSP-BF538F processors include a variety of general purpose functions designed to minimize external IC count and offer broad control and communication. Peripherals include three SPI®-compatible ports, three UARTs, four SPORT ports, three multifunction timers, 54 general-purpose I/Os, dual Two-Wire Interface for I2C operation, a real-time clock, a watchdog timer, an event controller, and a JTAG/debug interface. The flexible Parallel Peripheral Interface (PPI) offers a direct connection to a variety of video encoders/ decoders, display drivers, image sensors, and general-purpose converters.Development ToolsBlackfin Processors are supported by:Analog Devices CROSSCORE® brand of industry leading development tools. The CROSSCORE components include the VisualDSP++® software development environment, EZ-KIT Lite® evaluation systems, EZ-Extender™ daughter boards, and PCI-based or USB-based emulators.Green Hills® Software award-winning MULTI® Embedded Software Development Environment and associated emulators.

The ADSP-BF548 processors were specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. For applications that require additional external memory, the ADSP-BF548 family provides product variants specifically designed to interface to either Standard DDR1 or 1.8V Low-Power DDR memory devices.IP protection has become a necessary part of today’s embedded applications. The ADSP-BF54x provides a security scheme that balances flexibility and upgradeability with performance through the inclusion of a firmware based solution including OTP memory to enable users to implement private keys for secure access to program code.The ADSP-BF548 provides peripheral flexibility to complement its high performance processing. These rich system level peripherals are well suited for Advanced Vehicle Infotainment and Industrial multimedia applications where multiple standards are prevalent and system performance is required. To enhance connectivity, a High Speed USB On-the-Go (HS USB OTG) module with Integrated PHY has been integrated along with an 8/16-bit Host DMA Interface. These system level peripherals, along with standard serial connections provided by multiple on-chip SPORT, SPI, UART, TWI, and CAN interfaces, provide glue-less interfaces to multiple off chip devices including consumer and communication products, Bluetooth, and other application specific interfaces. This level of integration is perfect for the emerging and constantly changing products and standards in the car infotainment and multimedia segments.For interfacing off chip to storage media including hard drives, CD/DVD-drives, and NAND Flash products, the ADSP-BF548 has implemented a SD/SDIO controller, ATAPI-6 controller, and an 8/16-bit NAND flash controller. Many multimedia enhancements have also been included on the ADSP-BF548 to offload processor MIPS through hardware integration, expand display capabilities, and shorten customer development time. The multiple Enhanced Parallel Peripheral Interfaces that support ITU-R BT.656 Video Formats now can also drive 18/24-bit LCD displays. A Hardware acceleration block, the Pixel Compositor, has been developed to execute overlay, color conversion and alpha blending. This block significantly reduces processor core overhead associated with software RGB-YUV color conversion and alpha blending.For human interface capability, the ADSP-BF548 provides a 32-bit up/down counter that can sense 2-bit quadrature or binary codes as typically emitted by industrial drives or manual thumb wheels. An 8x8 Keypad interface is also included.

The ADSP-BF609 Blackfin processor is optimized for embedded vision and video analytics applications using a dual-core fixed-point DSP processor with a unique pipelined vision processor (PVP). The PVP is a set of functional blocks next to the Blackfin cores designed to accelerate image processing algorithms and reduce overall bandwidth requirements.Other features include a high performance enhanced infrastructure, large on-chip memory and a feature rich peripheral set with expanded connectivity options.In addition to these the ADSP-BF609 processor contains features for safety-critical applications, including a CRC for memory protection, Parity and ECC protection in the internal memory blocks and a Fault Management Unit.The ADSP-BF609 processor is ideal for many embedded vision applications such as automotive advanced driver assistance systems (ADAS), machine vision and robotics for industrial manufacturing systems, security and surveillance system analytics and bar code scanners.

The LTC4366 surge stopper protects loads from high voltage transients. By controlling the gate of an external N-channel MOSFET, the LTC4366 regulates the output during an overvoltage transient. The load may remain operational while the overvoltage is dropped across the MOSFET. Placing a resistor in the return line isolates the LTC4366 and allows it to float up with the supply; therefore, the upper limit on the output voltage depends only on the availability of high valued resistors and MOSFET ratings.An adjustable overvoltage timer prevents MOSFET damage during the surge while an additional 9-second timer provides for MOSFET cool down. A shutdown pin reduces the quiescent current to less than 14μA during shutdown. After a fault the LTC4366-1 latches off while the LTC4366-2 will auto-retry.Applications Industrial, Automotive and Avionic Surge Protection High Voltage DC Distribution 28V Vehicle Systems

SmartMesh WirelessHART wireless sensor networks are self managing, low power networks built from wireless nodes called motes. The LTC5800-WHM is the WirelessHART Mote-on-Chip™ integrated circuit in the Eterna® family of IEEE 802.15.4 System-on-Chip (SoC) solutions, featuring a highly integrated, low power radio design by Analog Devices as well as an ARM Cortex-M3 32-bit microprocessor running our embedded SmartMesh WirelessHART networking software.With Analog Devices' time-synchronized WirelessHART networks all motes in the network may route, source or terminate data while providing many years of battery powered operation. The SmartMesh WirelessHART software provided with the LTC5800-WHM is fully tested and validated, and is readily configured via a software Application Programming Interface.SmartMesh WirelessHART motes deliver a highly flexible network with proven reliability and low power performance in an easy-to-integrate platform. Network Features Feature Benefit Time Synchronized, Channel Hopping Communications >99.999% network reliability in even the most challenging RF environments Sub 50 µA Routers Can build out a network without any line powered devices. Flexibility to be line powered or energy harvested if desired. Secure Mesh with 128-bit AES Encryption NIST Certified Security. Compromise of one node does not compromise network. Standards-based Compliant to international standard IEC 62591 (WirelessHART) Highly Accurate Time Stamping Time stamping on every node is available to applications with millisecond accuracy Device Features Feature Benefit Industry-Leading Low Power Radio Technology 4.5mA to Receive a Packet 5.4mA to Transmit at 0dBm 9.7mA to Transmit at 8dBm Pre-engineered RF RF elements include an on-chip power amplifier and are pre-tuned for optimized performance, including temperature compensation, saving development time. Energy Harvesting Support Very low power design enables motes to be powered by a wide variety of energy harvesters ApplicationsLearn more about SmartMesh applications.

The SHARC ADSP-21489 is one of two new members of the fourth generation of SHARC® Processors that now includes the ADSP-21483, ADSP-21486, ADSP-21487, ADSP-21488, ADSP-21489 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting the latest surround-sound decoder algorithms. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.The ADSP-21489 offers the highest performance–450 MHz/2700 MFLOPs–in an LQFP package within the fourth generation SHARC Processor family. This level of performance makes the ADSP-21489 particularly well suited to address the automotive audio and industrial control segments. In addition to its high core performance, the ADSP-21489 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, IDP, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as SPI,UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).