400 MHz Low Cost Blackfin Processor Features: Performance to 400MHz/800MMACs enables multi-channel audio plus CIF video processing in multimedia applications Enhanced Dynamic Power Management with on-chip core voltage regulation allows operation to 0.8V extending battery life in portable applications Application-tuned peripherals provide glueless connectivity to general purpose converters in data acquisition applications Multiple low cost, pin- and code-compatible derivatives enable software differentiation in cost-sensitive consumer applications

Video Decoder and Display Processor

SHARC Processor

Digital Signal Processors & Controllers - DSP, DSC ADSP-BF523 Processor,533Mhz,Ethernet,USB

SmartMesh IP Wireless 802.15.4e System-on-Chip Features: 72-pin 10mm × 10mm QFN package 2.4 GHz, IEEE 802.15.4e System-on-Chip, Complete with Embedded SmartMesh Networking Software >99.999% Network Reliability in the Most Challenging RF Environments Sub 50µA Routing Nodes Serves as either a Wireless Mote, EManager, or Access Point Mote in a SmartMesh IP network These products contain encryption. Import/export restrictions may apply.

35V/3.2A Multi-Cell Lithium-Ion Step-Down Battery Charger with PowerPath and I2C Telemetry Features: Li-Ion/Polymer Battery Charger with Termination Wide Charging Input Voltage Range: 4.5V to 35V High Efficiency Synchronous Operation 16-Bit Digital Telemetry System Monitors VBAT, IBAT, RBAT, TBAT, TDIE, VIN, IIN, VOUT Charges 1-8 Lithium-Ion/Polymer Cells Input Undervoltage Charge Current Limit Loop Input MPPT for Solar Panel Inputs Input Current Limit Prioritizes System Load Output Low Loss PowerPath™ Instant-On Operation with Discharged or Missing Battery JEITA Temperature Controlled Charging Pin Compatible with LiFePO4 and SLA Versions

ARM 2xSHARC dual DDR HPC package

Low Cost sngl core BF+ w/Large Intl mem

CLOCK & TIMING ANALOG DEV KITS;

400MHz SHARC+ DSP with 640KB L1, 256KB Shared L2 SRAM, 400-Ball CSP_BGA Features:SHARC+ Core infrastructure 400MHz (max) Core clock frequency 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedMemory 256KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases One Level 3 (L3) interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.35 V capable DDR3L devices) SDRAM devices16-bit DDR/DDR3L Memory Controller 1.35V support for DDR3LAdvanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 4x Precision Clock Generators 28 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin 6x I2C,3x UARTs 2x Link Ports 10x General Purpose Timer, 1x General Purpose Counter 2x Watchdog Timers 4-ch 12bit Housekeeping ADCs 40 GPIO pins, 28 DAI pins Thermal SensorPackage 17mm x 17mm (0.8mm pitch) 400-ball CSP_BGAAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications