Laser Drivers 3.3V 622Mbps SDH/SONET

EVALUATION KIT, LED DRIVER;

EVALUATION KIT, LED DRIVER;

EVALUATION KIT, 800KHZ, 2.7V-5.5V, 10MA;

EVALUATION KIT, LINEAR, LED DRIVER;

Laser Drivers 3.2Gbps SFP VCSEL w/Diagnostic Mtr

LED Lighting Drivers 1.0A LED Flash Driver

The AD9888 is a complete 8-bit, 170 MSPS, monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 170 MSPS encode rate capability and full-power analog bandwidth of 500 MHz supports resolutions of up to 1600 × 1200 (UXGA) at 75 Hz.For ease of design and to minimize cost, the AD9888 is a fully integrated interface solution for flat panel displays. The AD9888 includes an analog interface that has a 170 MHz triple ADC with an internal 1.25 V reference phase-locked loop (PLL) to generate a pixel clock from HSYNC and COAST; midscale clamping; and programmable gain, offset, and clamp controls. The user provides only a 3.3 V power supply, analog input, and HSYNC and COAST signals. Three-state CMOS outputs can be powered from 2.5 V to 3.3 V.The on-chip PLL of the AD9888 generates a pixel clock from the HSYNC and COAST inputs. Pixel clock output frequencies range from 10 MHz to 170 MHz. PLL clock jitter is typically less than 450 ps p-p at 170 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of HSYNC. A sampling phase adjustment is provided. Data, HSYNC, and clock output phase relationships are maintained. The PLL can be disabled, and an external clock input can be provided as the pixel clock. The AD9888 also offers full sync processing for composite sync and sync-on-green applications.A CLAMP signal is generated internally or can be provided by the user through the CLAMP input pin. This device is fully programmable via a 2-wire serial port.Fabricated in an advanced CMOS process, the AD9888 is provided in a space-saving, 128-lead, MQFP, surface-mount, plastic package and is specified over the 0°C to 70°C temperature range. The AD9888 is also available in a Pb-free package. APPLICATIONS RGB Graphics Processing LCD Monitors and Projectors Plasma Display Panels Scan Converters Microdisplays Digital TV

The AD9984A is a complete 10-bit, 170 MSPS, monolithic analog interface optimized for capturing YPbPr video and RGB graphics signals. Its 170 MSPS encode rate capability and full power analog bandwidth of 300 MHz support all HDTV video modes up to 1080p, as well as graphics resolutions up to UXGA (1600 × 1200 at 60 Hz). The AD9984A includes a 170 MHz triple ADC with an internal reference, a PLL, and programmable gain, offset, and clamp control. The user provides only a 1.8 V power supply and an analog input. Three-state CMOS outputs can be powered from 1.8 V to 3.3 V. The AD9984A on-chip PLL generates a sample clock from the tri-level sync (for YPbPr video) or the horizontal sync (for RGB graphics). Sample clock output frequencies range from 10 MHz to 170 MHz. With internal coast generation, the PLL maintains its output frequency in the absence of a sync input. A 32-step sampling clock phase adjustment is provided. Output data, sync, and clock phase relationships are maintained. The auto-offset feature can be enabled to automatically restore the signal reference levels and calibrate out any offset differences between the three channels. The auto channel-to-channel gain-matching feature can be enabled to minimize any gain mismatches between the three channels. The AD9984A also offers full sync processing for composite sync and sync-on-green applications. A clamp signal is generated internally or can be provided by the user through the CLAMP input pin. Fabricated in an advanced CMOS process, the AD9984A is provided in a space-saving, Pb-free, 80-lead low profile quad flat package (LQFP) or 64-lead lead frame chip scale package (LFCSP) and is specified over the 0°C to 70°C temperature range.APPLICATIONSAdvanced TVs Plasma display panels LCDTV HDTV RGB graphics processing LCD monitors and projectors Scan converters

The LT3799 is an isolated flyback controller with power factor correction specifically designed for driving LEDs. The controller operates using critical conduction mode allowing the use of a small transformer. Using a novel current sensing scheme, the controller is able to deliver a well regulated current to the secondary side without using an opto-coupler. A strong gate driver is included to drive an external high voltage MOSFET. Utilizing an onboard multiplier, the LT3799 typically achieves power factors of 0.97. The FAULT pin provides notification of open and short LED conditions.The LT3799 uses a micropower hysteretic start-up to efficiently operate at offline input voltages, with a third winding to provide power to the part. An internal LDO provides a well regulated supply for the part’s internal circuitry and gate driver. TRIAC Dimmable LED Current Regulation LT3799 YES ±10% LT3799-1 NO ±5% Applications Offline 4W to 100W+ LED Applications High DC VIN LED Applications