The AD9888 is a complete 8-bit, 170 MSPS, monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 170 MSPS encode rate capability and full-power analog bandwidth of 500 MHz supports resolutions of up to 1600 × 1200 (UXGA) at 75 Hz.For ease of design and to minimize cost, the AD9888 is a fully integrated interface solution for flat panel displays. The AD9888 includes an analog interface that has a 170 MHz triple ADC with an internal 1.25 V reference phase-locked loop (PLL) to generate a pixel clock from HSYNC and COAST; midscale clamping; and programmable gain, offset, and clamp controls. The user provides only a 3.3 V power supply, analog input, and HSYNC and COAST signals. Three-state CMOS outputs can be powered from 2.5 V to 3.3 V.The on-chip PLL of the AD9888 generates a pixel clock from the HSYNC and COAST inputs. Pixel clock output frequencies range from 10 MHz to 170 MHz. PLL clock jitter is typically less than 450 ps p-p at 170 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of HSYNC. A sampling phase adjustment is provided. Data, HSYNC, and clock output phase relationships are maintained. The PLL can be disabled, and an external clock input can be provided as the pixel clock. The AD9888 also offers full sync processing for composite sync and sync-on-green applications.A CLAMP signal is generated internally or can be provided by the user through the CLAMP input pin. This device is fully programmable via a 2-wire serial port.Fabricated in an advanced CMOS process, the AD9888 is provided in a space-saving, 128-lead, MQFP, surface-mount, plastic package and is specified over the 0°C to 70°C temperature range. The AD9888 is also available in a Pb-free package. APPLICATIONS RGB Graphics Processing LCD Monitors and Projectors Plasma Display Panels Scan Converters Microdisplays Digital TV

The ADDI9023 is twelve channel vertical driver for CCD imaging applications. It includes eight 3-level drivers and four 2-level drivers. The input configuration can support up to nine individual vertical timing phases and eight shift gate signals. A separate substrate clock channel (SUBCK) is also included. Typical load drive capability for each channel is 3nF.The ADDI9023 is specified over an operating temperature range of −25°C to +85°C.APPLICATIONS Digital Still Cameras Industrial cameras Surveillance cameras Medical imaging

DISPLAY INTERFACE, 10BIT, 1.9V, LQFP-80; IC Interface Type:I2C; Interface Applications:LCD Monitors and Projectors, Plasma Display Panels, RGB Graphics Processing; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V; No. of Pins:80Pins RoHS Compliant: Yes

Demonstration circuit DC1666A is a synchronous four-switch buck-boost LED driver controller. It accepts an input voltage from 4.7V to 60V, and drives up to 25V of LEDs at 2A. DC1666A features both PWM and analog dimming of the LED string. It has an OPENLED flag that indicates when the LED string has been removed and it has a SHORTLED flag that indicates that the output has been shorted to GND. In both cases, the IC remains in control and well protected.

110MHz ANALOG INTFCE FOR SGA FPD

LIGHTING DEVELOPMENT KITS;

EVALUATION KIT, LED DRIVER;

EVALUATION KIT, LED DRIVER;

Laser Drivers 3.3V 622Mbps SDH/SONET

Laser Drivers 3.2Gbps SFP VCSEL w/Diagnostic Mtr