RF Mixer

RF Amplifier T/H amp 18GHz UWB

The AD9363 is a high performance, highly integrated RF agiletransceiver designed for use in 3G and 4G femtocell applications.Its programmability and wideband capability make it ideal for abroad range of transceiver applications. The device combines anRF front end with a flexible mixed-signal baseband section andintegrated frequency synthesizers, simplifying design-in byproviding a configurable digital interface to a processor. TheAD9363 operates in the 325 MHz to 3.8 GHz range, coveringmost licensed and unlicensed bands. Channel bandwidths fromless than 200 kHz to 20 MHz are supported.The two independent direct conversion receivers have state-of-the-artnoise figure and linearity. Each Rx subsystem includesindependent automatic gain control (AGC), dc offset correction,quadrature correction, and digital filtering, thereby eliminatingthe need for these functions in the digital baseband. The AD9363also has flexible manual gain modes that can be externallycontrolled. Two high dynamic range ADCs per channel digitizethe received I and Q signals and pass them through configurabledecimation filters and 128-tap finite impulse response (FIR)filters to produce a 12-bit output signal at the appropriatesample rate.The transmitters use a direct conversion architecture that achieveshigh modulation accuracy with ultralow noise. This transmitterdesign produces a best-in-class Tx EVM of −34 dB, allowingsignificant system margin for the external power amplifier (PA)selection. The on-board Tx power monitor can be used as apower detector, enabling highly accurate Tx powermeasurements.The fully integrated phase-locked loops (PLLs) provide lowpower fractional N frequency synthesis for all receive andtransmit channels. Channel isolation, demanded by FDDsystems, is integrated into the design. All voltage controlledoscillators (VCOs) and loop filter components are integrated.The core of the AD9363 can be powered directly from a 1.3 Vregulator. The IC is controlled via a standard 4-wire serial portand four real-time I/O control pins. Comprehensive power-downmodes are included to minimize power consumption duringnormal use. The AD9363 is packaged in a 10 mm × 10 mm,144-ball chip scale package ball grid array (CSP_BGA).Applications 3G enterprise femtocell base stations 4G femtocell base stations Wireless video transmission

The AD9371 is a highly integrated, wideband RF transceiveroffering dual channel transmitters and receivers, integrated synthesizers, and digital signal processing functions. The ICdelivers a versatile combination of high performance and low power consumption required by 3G/4G micro and macro BTSequipment in both FDD and TDD applications. The AD9371operates from 300 MHz to 6000 MHz, covering most of the licensed and unlicensed cellular bands. The IC supports receiver bandwidths up to 100 MHz. It also supports observation receiver and transmit synthesis bandwidths up to 250 MHz to accommodate digital correction algorithms.The transceiver consists of wideband direct conversion signalpaths with state-of-the-art noise figure and linearity. Each complete receiver and transmitter subsystem includes dc offset correction, quadrature error correction (QEC), and programmable digitalfilters, eliminating the need for these functions in the digitalbaseband. Several auxiliary functions such as an auxiliary analog-to-digital converter (ADC), auxiliary digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) are integratedto provide additional monitoring and control capability.An observation receiver channel with two inputs is included to monitor each transmitter output and implement interference mitigation and calibration applications. This channel also connects to three sniffer receiver inputs that can monitor radio activity in different bands.The high speed JESD204B interface supports lane rates up to 6144 Mbps. Four lanes are dedicated to the transmitters and four lanes are dedicated to the receiver and observation receiver channels.The fully integrated phase-locked loops (PLLs) provide high performance, low power fractional-N frequency synthesis forthe transmitter, the receiver, the observation receiver, and theclock sections. Careful design and layout techniques provide theisolation demanded in high performance base station applications.All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count. A 1.3 V supply is required to power the core of the AD9371, anda standard 4-wire serial port controls it. Other voltage supplies provide proper digital interface levels and optimize transmitterand auxiliary converter performance. The AD9371 is packaged in a12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G/4G micro and macro base stations (BTS) 3G/4G multicarrier picocells  FDD and TDD active antenna systems  Microwave, nonline of sight (NLOS) backhaul systems

The MAX7032 crystal-based, fractional-N transceiver is designed to transmit and receive ASK/OOK or FSK data in the 300MHz to 450MHz frequency range with data rates up to 33kbps (Manchester encoded) or 66kbps (NRZ encoded). This device generates a typical output power of +10dBm into a 50Ω load, and exhibits typical sensitivities of -114dBm for ASK data and -110dBm for FSK data. The MAX7032 features separate transmit and receive pins (PAOUT and LNAIN) and provides an internal RF switch that can be used to connect the transmit and receive pins to a common antenna.The MAX7032 transmit frequency is generated by a 16-bit, fractional-N, phase-locked loop (PLL), while the receiver's local oscillator (LO) is generated by an integer-N PLL. This hybrid architecture eliminates the need for separate transmit and receive crystal reference oscillators because the fractional-N PLL allows the transmit frequency to be set within 2kHz of the receive frequency. The 12-bit resolution of the fractional-N PLL allows frequency multiplication of the crystal frequency in steps of fXTAL/4096. Retaining the fixed-N PLL for the receiver avoids the higher current drain requirements of a fractional-N PLL and keeps the receiver current drain as low as possible.The fractional-N architecture of the MAX7032 transmit PLL allows the transmit FSK signal to be programmed for exact frequency deviations, and completely eliminates the problems associated with oscillator-pulling FSK signal generation. All frequency-generation components are integrated on-chip, and only a crystal, a 10.7MHz IF filter, and a few discrete components are required to implement a complete antenna/digital data solution.The MAX7032 is available in a small 5mm x 5mm, 32-pin, thin QFN package, and is specified to operate in the automotive -40°C to +125°C temperature range.Applications2-Way Remote Keyless EntryGarage Door OpenersHome AutomationLocal Telemetry SystemsRemote ControlsRemote SensingSecurity SystemsSmoke Alarms

The AD8302 is a fully integrated system for measuring gain/loss and phase in numerous receive, transmit, and instrumentation applications. It requires few external components and a single supply of 2.7 V–5.5 V. The ac-coupled input signals can range from –60 dBm to 0 dBm in a 50 Ω system, from low frequencies up to 2.7 GHz. The outputs provide an accurate measurement of either gain or loss over a ±30 dB range scaled to 30 mV/dB, and of phase over a 0°–180° range scaled to 10 mV/degree. Both subsystems have an output bandwidth of 30 MHz, which may optionally be reduced by the addition of external filter capacitors. The AD8302 can be used in controller mode to force the gain and phase of a signal chain toward predetermined setpoints. The AD8302 comprises a closely matched pair of demodulating logarithmic amplifiers, each having a 60 dB measurement range. By taking the difference of their outputs, a measurement of the magnitude ratio or gain between the two input signals is available. These signals may even be at different frequencies, allowing the measurement of conversion gain or loss. The AD8302 may be used to determine absolute signal level by applying the unknown signal to one input and a calibrated ac reference signal to the other. With the output stage feedback connection disabled, a comparator may be realized, using the setpoint pins MSET and PSET to program the thresholds.The signal inputs are single-ended, allowing them to be matched and connected directly to a directional coupler. Their input impedance is nominally 3 kΩ at low frequencies. The AD8302 includes a phase detector of the multiplier type, but with precise phase balance driven by the fully limited signals appearing at the outputs of the two logarithmic amplifiers. Thus, the phase accuracy measurement is independent of signal level over a wide range. The phase and gain output voltages are simultaneously available at loadable ground referenced outputs over the standard output range of 0 V to 1.8 V. The output drivers can source or sink up to 8 mA. A loadable, stable reference voltage of 1.8 V is available for precise repositioning of the output range by the user. In controller applications, the connection between the gain output pin VMAG and the setpoint control pin MSET is broken. The desired setpoint is presented to MSET and the VMAG control signal drives an appropriate external variable gain device. Likewise, the feedback path between the phase output pin VPHS and its setpoint control pin PSET may be broken to allow operation as a phase controller. The AD8302 is fabricated on Analog Devices’ proprietary, high performance 25 GHz SOI complementary bipolar IC process. It is available in a 14-lead TSSOP package and operates over a –40°C to +85°C temperature range. An evaluation board is available.

The AD8302 is a fully integrated system for measuring gain/loss and phase in numerous receive, transmit, and instrumentation applications. It requires few external components and a single supply of 2.7 V–5.5 V. The ac-coupled input signals can range from –60 dBm to 0 dBm in a 50 Ω system, from low frequencies up to 2.7 GHz. The outputs provide an accurate measurement of either gain or loss over a ±30 dB range scaled to 30 mV/dB, and of phase over a 0°–180° range scaled to 10 mV/degree. Both subsystems have an output bandwidth of 30 MHz, which may optionally be reduced by the addition of external filter capacitors. The AD8302 can be used in controller mode to force the gain and phase of a signal chain toward predetermined setpoints. The AD8302 comprises a closely matched pair of demodulating logarithmic amplifiers, each having a 60 dB measurement range. By taking the difference of their outputs, a measurement of the magnitude ratio or gain between the two input signals is available. These signals may even be at different frequencies, allowing the measurement of conversion gain or loss. The AD8302 may be used to determine absolute signal level by applying the unknown signal to one input and a calibrated ac reference signal to the other. With the output stage feedback connection disabled, a comparator may be realized, using the setpoint pins MSET and PSET to program the thresholds.The signal inputs are single-ended, allowing them to be matched and connected directly to a directional coupler. Their input impedance is nominally 3 kΩ at low frequencies. The AD8302 includes a phase detector of the multiplier type, but with precise phase balance driven by the fully limited signals appearing at the outputs of the two logarithmic amplifiers. Thus, the phase accuracy measurement is independent of signal level over a wide range. The phase and gain output voltages are simultaneously available at loadable ground referenced outputs over the standard output range of 0 V to 1.8 V. The output drivers can source or sink up to 8 mA. A loadable, stable reference voltage of 1.8 V is available for precise repositioning of the output range by the user. In controller applications, the connection between the gain output pin VMAG and the setpoint control pin MSET is broken. The desired setpoint is presented to MSET and the VMAG control signal drives an appropriate external variable gain device. Likewise, the feedback path between the phase output pin VPHS and its setpoint control pin PSET may be broken to allow operation as a phase controller. The AD8302 is fabricated on Analog Devices’ proprietary, high performance 25 GHz SOI complementary bipolar IC process. It is available in a 14-lead TSSOP package and operates over a –40°C to +85°C temperature range. An evaluation board is available.

The AD8349 is high performance quadrature modulator design for use as a single stage up-converter within wireless infrastructure equipment.The AD8349 provides a high output power and very low noise floor supporting a significant improvement in the output signal range. Additionally the excellent phase and amplitude balance accuracy support a higher sideband suppression specification enabling higher order / capacity QAM modulated radios.The AD8349 has been tested for use over the common Cellular bands (900 MHz, 1.9 GHz, 2.1 GHz) meeting the needs as specified by the CDMA/GSM Edge/W-CDMA standards.The AD8349 is supplied in 16-lead Thin Shrunk Small Outline (TSSOP) package, and fully specified over -40ºC to 85ºC temperature range.APPLICATIONS Cellular/PCS communication systems infrastructure WCDMA/CDMA2000/PCS/GSM/EDGE Wireless LAN/wireless local loop LMDS/broadband wireless access systemsAVAILABILITYSamples (part number AD8349ARE) and an evaluation board (part number AD8349-EVAL) are available. Other Modulator / Demodulator ProductsAD8345 - 250 - 1000 MHz RF / IF Quadrature ModulatorAD8346 - 2.5 GHz Direct Conversion Quadrature ModulatorAD8347 - 800 MHz to 2.7 GHz RF / IF Quadrature DemodulatorAD8348 - 50 - 1000 MHz RF / IF Quadrature Demodulator

Sub-GHz Modules 600deg Anlg Phase Shift Module 6-15 GHz

RF Mixer mix, 1900MHz, BiCMOS