The LTC6430-15 is a differential gain block amplifier designed to drive high resolution, high speed ADCs with excellent linearity beyond 1000MHz and with low associated output noise. The LTC6430-15 operates from a single 5V power supply and consumes only 800mW.In its differential configuration, the LTC6430-15 can directly drive the differential inputs of an ADC. Using 1:2 baluns, the device makes an excellent 50? wideband balanced amplifier. While using 1:1.33 baluns, the device makes a high fidelity 50MHz to 1000MHz 75? CATV amplifier.The LTC6430-15 is designed for ease of use, requiring a minimum of support components. The device is internally matched to 100? differential source/load impedance. On-chip bias and temperature compensation ensure consistent performance over environmental changes.The LTC6430-15 uses a high performance SiGe BiCMOS process for excellent repeatability compared with similar GaAs amplifiers. All A-grade LTC6430-15 devices are tested and guaranteed for OIP3 at 240MHz. The LTC6430-15 is housed in a 4mm ? 4mm, 24-lead, QFN package with an exposed pad for thermal management and low inductance. For a single-ended 50? IF gain block with similar performance, see the related LTC6431-15.Applications Differential ADC Driver Differential IF Amplifier OFDM Signal Chain Amplifier 50? Balanced IF Amplifier 75? CATV Amplifier 700MHz to 800MHz LTE Amplifier

The AD8333 is a dual-phase shifter and I/Q demodulator that enables coherent summing and phase alignment of multiple analog data channels. It is the first solid-state device suitable forbeamformer circuits, such as those used in high performance medical ultrasound equipment featuring CW Doppler. The RF inputs interface directly with the outputs of the dual-channel, low noise preamplifiers included in the?AD8332.A divide-by-4 circuit generates the internal 0? and 90? phases of the local oscillator (LO) that drive the mixers of a pair of matched I/Q demodulators.The AD8333 can be applied as a major element in analog beamformer circuits in medical ultrasound equipment.The AD8333 features an asynchronous reset pin. When used in arrays, the reset pin sets all the LO dividers in the same state. Sixteen discrete phase rotations in 22.5? increments can be selected independently for each channel. For example, if Channel 1 is used as a reference and the RF signal applied to Channel 2 has an I/Q phase lead of 45?, Channel 2 can be phase aligned with Channel 1 by choosing the correct code.Phase shift is defined by the output of one channel relative to another. For example, if the code of Channel 1 is adjusted to 0000 and that of Channel 2 to 0001 and the same signal is applied to both RF inputs, the output of Channel 2 leads that of Channel 1 by 22.5?.The I and Q outputs are provided as currents to facilitate summation. The summed current outputs are converted to voltages by a high dynamic-range, current-to-voltage (I-V) converter, such as the AD8021, configured as a transimpedance amplifier. The resultant signal is then applied to a high resolution ADC, such as the AD7665 (16 bit/570 kSPS).The two I/Q demodulators can be used independently in other nonbeamforming applications. In that case, a transimpedance amplifier is needed for each of the I and Q outputs, four in total for the dual I/Q demodulator.The dynamic range is 159 dB/Hz at each I and Q output, but the following transimpedance amplifier is an important element in maintaining the overall dynamic range, and attention needs to be paid to optimal component selection and design.The AD8333 is available in a 32-lead LFCSP (5 mm ? 5 mm) package for the industrial temperature range of ?40?C to +85?C.Applications Medical imaging (CW ultrasound beamforming) Phased array systems (radar and adaptive antennas) Communication receivers

Phase Locked Loops - PLL PLL + VCO 750-860MHz

Quad IF Receiver Features: 11-bit 200MSPS output data rate per channel Integrated Noise Shaping Requantizer (NSR) Performance with NSR enabled: SNR: 75.5 dBFS in 40 MHz band to 70 MHz @ 185 MSPS SNR: 73.7 dBFS in 60 MHz band to 70 MHz @ 185 MSPS Performance with NSR disabled: SNR: 66.5 dBFS to 70 MHz @ 185 MSPS SFDR: 83 dBc to 70 MHz @ 185 MSPS Low power: 1.2 W @ 185 MSPS 1.8 V analog supply operation 1.8 V LVDS (ANSI-644 levels) output 1-to-8 integer clock divider Internal ADC voltage reference 1.75 V p-p analog input range (programmable to 2.0 V p-p) Differential analog inputs with 800 MHz bandwidth See data sheet for additional features

6GHz High Linearity I/Q Demodulator with Wideband IF Amplifier Features:300MHz to 6GHz Operating FrequencyWide IF Bandwidth: DC to 1GHz (–1dB Bandwidth)High Mixer IIP3: 30dBm at 1.9GHzHigh Total OIP3: 40dBm at 1.9GHzHigh Total OIP2: 74dBm at 1.9GHzUser Adjustable OIP2 to 80dBmUser Adjustable Image Rejection to 60dBUser Adjustable DC Offset NullSerial InterfacePower Conversion Gain: 7.7dB at 1.9GHz31dB RF Attenuator with 1dB Step SizeRF Switch with 40dB Isolation at 1.9GHzSingle-Ended RF Inputs with On-Chip TransformerIF Amplifier Gain Adjustable in 8 StepsOperating Temperature Range (TC): –40°C to 105°C32-Lead 5mm × 5mm QFN Package

The LTC6430-20 is a differential gain block amplifier designed to drive high resolution, high speed ADCs with excellent linearity beyond 1000MHz and with low associated output noise. The LTC6430-20 operates from a single 5V power supply and consumes only 850mW.In its differential configuration, the LTC6430-20 can directly drive the differential inputs of an ADC. Using 1:2 baluns, the device makes an excellent 50? wideband balanced amplifier. While using 1:1.33 baluns, the device creates a high fidelity 40MHz to 1000MHz 75? CATV amplifier.The LTC6430-20 is designed for ease of use, requiring a minimum of support components. The device is internally matched to 100? differential source/load impedance. On-chip bias and temperature compensation ensure consistent performance over environmental changes.The LTC6430-20 uses a high performance SiGe BiCMOS process for excellent repeatability compared with similar GaAs amplifiers. All A-grade LTC6430-20 devices are tested and guaranteed for OIP3 at 380MHz. The LTC6430-20 is housed in a 4mm ? 4mm, 24-lead, QFN package with an exposed pad for thermal management and low inductance. A single-ended 50? IF gain block with similar performance is also available, see the related LTC6431-20.Applications Differential ADC Driver Differential IF Amplifier OFDM Signal Chain Amplifier 50? Balanced IF Amplifier 75? CATV Amplifier 700MHz to 800MHz LTE Amplifier Low Phase Noise Clock or LO Amplifier

The HMC1063LP3E is a compact I/Q MMIC mixer in a leadless ?Pb free? SMT package, which can be used as either an Image Reject Mixer or a Single Sideband Upconverter. The mixer utilizes two standard Hittite double balanced mixer cells and a 90 degree hybrid fabricated in a GaAs Schottky diode process. A low frequency quadrature hybrid was used to produce a 1000 MHz LSB IF output. This product is a much smaller alternative to hybrid style Image Reject Mixers and Single Sideband Upconverter assemblies. The HMC1063LP3E eliminates the need for wire bonding and allows the use of surface mount manufacturing techniques.APPLICATIONS Point-to-Point and Point-to-Multi-Point Radio Military Radar, EW & ELINT Satellite Communications Sensors

The ADRF5549 is a dual-channel, integrated, RF front-end multichip module designed for time division duplexing (TDD) applications that operates from 1.8 GHz to 2.8 GHz. The ADRF5549 is configured in dual channels with a cascading, two-stage, low noise amplifier (LNA) and a high power, silicon single-pole, double-throw (SPDT) switch.In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure of 1.4 dB and a high gain of 35 dB with an output third-order intercept point (OIP3) of 32 dBm typical.In low gain mode, one stage of the two-stage LNA is in bypass mode providing 17 dB of gain at a lower current of 35 mA. In power-down mode, the LNAs are turned off, and the device draws 12 mA.In transmit operation, when RF inputs are connected to a termination pin (TERM-ChA or TERM-ChB), the switch provides a low insertion loss of 0.6 dB and handles a long-term evolution (LTE) full lifetime average (9 dB peak to average ratio (PAR)) of 40 dBm and 43 dBm for a 9 dB PAR LTE single event (ApplicationsWireless InfrastructureTDD massive multiple input and multiple output (MIMO) and active antenna systemsTDD-based communication systems

ATTENUATORS / GEL_PACK

RF MIXERS/MULTIPLIERS RF IC'S;