The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a Σ-Δ-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment

The AD6655 is a mixed-signal intermediate frequency (IF) receiver consisting of dual 14-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS ADCs and a wideband digital downconverter (DDC). The AD6655 is designed to support communications applications where low cost, small size, and versatility are desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.ADC data outputs are internally connected directly to the digital downconverter (DDC) of the receiver, simplifying layout and reducing interconnection parasitics. The digital receiver has two channels and provides processing flexibility. Each receive channel has four cascaded signal processing stages: a 32-bit frequency translator (numerically controlled oscillator (NCO)), a half-band decimating filter, a fixed FIR filter, and an fADC/8 fixed-frequency NCO.In addition to the receiver DDC, the AD6655 has several functions that simplify the automatic gain control (AGC) function in the system receiver. The fast detect feature allows fast overrange detection by outputting four bits of input level information with short latency.In addition, the programmable threshold detector allows monitoring of the incoming signal power using the four fast detect bits of the ADC with low latency. If the input signal level exceeds the programmable threshold, the coarse upper threshold indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition.The second AGC-related function is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system.After digital processing, data can be routed directly to the two external 14-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or as 1.8 V LVDS. The CMOS data can also be output in an interleaved configuration at a double data rate using only Port A.The AD6655 receiver digitizes a wide spectrum of IF frequencies. Each receiver is designed for simultaneous reception of the main channel and the diversity channel. This IF sampling architecture greatly reduces component cost and complexity compared with traditional analog techniques or less integrated digital methods.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.The AD6655 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.Product Highlights Integrated dual, 14-bit, 150 MSPS ADC. Integrated wideband decimation filter and 32-bit complex NCO. Fast overrange detect and signal monitor with serial output. Proprietary differential input maintains excellent SNR performance for input frequencies up to 450 MHz. Flexible output modes, including independent CMOS, interleaved CMOS, IQ mode CMOS, and interleaved LVDS. SYNC input allows synchronization of multiple devices. 3-bit SPI port for register programming and register readback.Applications Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Broadband data applications

The ADuCRF101 is a fully integrated, data acquisition solution that is designed for low power, wireless applications. It features a 12-bit analog-to-digital converter (ADC), a low power ARM Cortex™-M3 processor, a 862 MHz to 928 MHz and 431 MHz to 464 MHz RF transceiver, and Flash®/EE memory. The ADuCRF101 is packaged in a 9 mm × 9 mm LFCSP.The data acquisition section consists of a 12-bit SAR ADC. The six inputs can be configured in single-ended or differential mode. When configured in single-ended mode, they can be used for ratiometric measurements on sensors that are powered, when required, from the internal low dropout regulator (LDO). An internal battery monitor channel and an on-chip temperature sensor are also available.This wireless data acquisition system is designed to operate in battery-powered applications where low power is critical. The device can be configured in normal operating mode or different low power modes under direct program control. In flexi mode, any peripheral can wake up the device and operate it. In hibernate mode, the internal wake-up timer remains active. In shutdown mode, only an external interrupt can wake up the device.The ADuCRF101 integrates a low power ARM Cortex-M3 processor. It is a 32-bit RISC machine, offering up to 1.25 DMIPS peak performance. The ARM Cortex-M3 processor also has a flexible 14-channel direct memory access (DMA) controller that supports communication peripherals, serial peripheral interface (SPI), UART, and I2C. Also provided on chip are 128 kB of nonvolatile Flash/EE memory and 16 kB of SRAM.A 16 MHz on-chip oscillator generates the system clock. This clock can be internally divided for the processor to operate at a lower frequency, thus saving power. A low power, internal 32 kHz oscillator is available and can be used to clock the four timers, as follows: two general-purpose timers, a wake-up timer, and a system watchdog timer.A range of communication peripherals can be configured, as required, in a specific application. These peripherals include UART, I2C, SPI, GPIO ports, PWM, and RF transceivers.The RF transceiver communicates in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands using multiple configurations.On-chip factory firmware supports in-circuit serial download via the UART, and nonintrusive emulation and program download are also supported via the serial wire interface. These features are incorporated into a low cost development system supporting this precision analog microcontroller family.The ADuCRF101 operates from 2.2 V to 3.6 V and is specified over an industrial temperature range of −40°C to +85°C. It is available in a 64-lead LFCSP packageApplications Battery powered wireless sensor Medical telemetry systems Industrial and home automation Asset tracking Security systems (access systems) Health and fitness applications  

The ADuCRF101 is a fully integrated, data acquisition solution that is designed for low power, wireless applications. It features a 12-bit analog-to-digital converter (ADC), a low power ARM Cortex™-M3 processor, a 862 MHz to 928 MHz and 431 MHz to 464 MHz RF transceiver, and Flash®/EE memory. The ADuCRF101 is packaged in a 9 mm × 9 mm LFCSP.The data acquisition section consists of a 12-bit SAR ADC. The six inputs can be configured in single-ended or differential mode. When configured in single-ended mode, they can be used for ratiometric measurements on sensors that are powered, when required, from the internal low dropout regulator (LDO). An internal battery monitor channel and an on-chip temperature sensor are also available.This wireless data acquisition system is designed to operate in battery-powered applications where low power is critical. The device can be configured in normal operating mode or different low power modes under direct program control. In flexi mode, any peripheral can wake up the device and operate it. In hibernate mode, the internal wake-up timer remains active. In shutdown mode, only an external interrupt can wake up the device.The ADuCRF101 integrates a low power ARM Cortex-M3 processor. It is a 32-bit RISC machine, offering up to 1.25 DMIPS peak performance. The ARM Cortex-M3 processor also has a flexible 14-channel direct memory access (DMA) controller that supports communication peripherals, serial peripheral interface (SPI), UART, and I2C. Also provided on chip are 128 kB of nonvolatile Flash/EE memory and 16 kB of SRAM.A 16 MHz on-chip oscillator generates the system clock. This clock can be internally divided for the processor to operate at a lower frequency, thus saving power. A low power, internal 32 kHz oscillator is available and can be used to clock the four timers, as follows: two general-purpose timers, a wake-up timer, and a system watchdog timer.A range of communication peripherals can be configured, as required, in a specific application. These peripherals include UART, I2C, SPI, GPIO ports, PWM, and RF transceivers.The RF transceiver communicates in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands using multiple configurations.On-chip factory firmware supports in-circuit serial download via the UART, and nonintrusive emulation and program download are also supported via the serial wire interface. These features are incorporated into a low cost development system supporting this precision analog microcontroller family.The ADuCRF101 operates from 2.2 V to 3.6 V and is specified over an industrial temperature range of −40°C to +85°C. It is available in a 64-lead LFCSP packageApplications Battery powered wireless sensor Medical telemetry systems Industrial and home automation Asset tracking Security systems (access systems) Health and fitness applications  

The ADuCRF101 is a fully integrated, data acquisition solution that is designed for low power, wireless applications. It features a 12-bit analog-to-digital converter (ADC), a low power ARM Cortex™-M3 processor, a 862 MHz to 928 MHz and 431 MHz to 464 MHz RF transceiver, and Flash®/EE memory. The ADuCRF101 is packaged in a 9 mm × 9 mm LFCSP.The data acquisition section consists of a 12-bit SAR ADC. The six inputs can be configured in single-ended or differential mode. When configured in single-ended mode, they can be used for ratiometric measurements on sensors that are powered, when required, from the internal low dropout regulator (LDO). An internal battery monitor channel and an on-chip temperature sensor are also available.This wireless data acquisition system is designed to operate in battery-powered applications where low power is critical. The device can be configured in normal operating mode or different low power modes under direct program control. In flexi mode, any peripheral can wake up the device and operate it. In hibernate mode, the internal wake-up timer remains active. In shutdown mode, only an external interrupt can wake up the device.The ADuCRF101 integrates a low power ARM Cortex-M3 processor. It is a 32-bit RISC machine, offering up to 1.25 DMIPS peak performance. The ARM Cortex-M3 processor also has a flexible 14-channel direct memory access (DMA) controller that supports communication peripherals, serial peripheral interface (SPI), UART, and I2C. Also provided on chip are 128 kB of nonvolatile Flash/EE memory and 16 kB of SRAM.A 16 MHz on-chip oscillator generates the system clock. This clock can be internally divided for the processor to operate at a lower frequency, thus saving power. A low power, internal 32 kHz oscillator is available and can be used to clock the four timers, as follows: two general-purpose timers, a wake-up timer, and a system watchdog timer.A range of communication peripherals can be configured, as required, in a specific application. These peripherals include UART, I2C, SPI, GPIO ports, PWM, and RF transceivers.The RF transceiver communicates in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands using multiple configurations.On-chip factory firmware supports in-circuit serial download via the UART, and nonintrusive emulation and program download are also supported via the serial wire interface. These features are incorporated into a low cost development system supporting this precision analog microcontroller family.The ADuCRF101 operates from 2.2 V to 3.6 V and is specified over an industrial temperature range of −40°C to +85°C. It is available in a 64-lead LFCSP packageApplications Battery powered wireless sensor Medical telemetry systems Industrial and home automation Asset tracking Security systems (access systems) Health and fitness applications  

The ADL5523 is a high performance GaAs pHEMT low noise amplifier. It provides high gain and low noise figure for single-downconversion IF sampling receiver architectures as well as direct-downconversion receivers.The ADL5523 provides a high level of integration by incorporating the active bias and the dc blocking capacitors, making it very easy to use while not sacrificing design flexibility.The ADL5523 is easy to tune, requiring only a few external components. The device can support operation from 3 V to 5 V, and the current draw can be adjusted with the external bias resistor for applications requiring very low power consumption.The ADL5523 comes in a compact, thermally enhanced, 3 mm × 3 mm LFCSP and operates over the temperature range of −40°C to +85°C.A fully populated evaluation board is also available.

The ADL5562 is a high performance differential amplifier optimized for RF and IF applications. The amplifier offers low noise of 2.1 nV/√Hz and excellent distortion performance over a wide frequency range, making it an ideal driver for high speed 8-bit to 16-bit ADCs.The ADL5562 provides three gain levels of 6 dB, 12 dB, and 15.5 dB through a pin-strappable configuration. For the single-ended input configuration, the gains are reduced to 5.6 dB, 11.1 dB, and 14.1 dB. Using an external series input resistor expands the amplifier gain flexibility and allows for any gain selection from 0 dB to 15.5 dB.The quiescent current of the ADL5562 is typically 80 mA and, when disabled, consumes less than 3 mA, offering excellent input-to-output isolation.The device is optimized for wideband, low distortion performance. These attributes, together with its adjustable gain capability, make this device the amplifier of choice for general-purpose IF and broadband applications where low distortion, noise, and power are critical. This device is optimized for the best combination of slew speed, bandwidth, and broadband distortion. These attributes allow it to drive a wide variety of ADCs and make it ideally suited for driving mixers, pin diode attenuators, SAW filters, and multielement discrete devices.Fabricated on an Analog Devices, Inc., high speed SiGe process, the ADL5562 is supplied in a compact 3 mm × 3 mm, 16-lead LFCSP package and operates over the temperature range of −40°C to + 85°C.APPLICATIONS Differential ADC drivers Single-ended to differential conversion RF/IF gain blocks SAW filter interfacing

The ADL5370 is the first in the fixed-gain quadrature modulator(F-MOD) family designed for use from 300 MHz to 1000 MHz.Its excellent phase accuracy and amplitude balance enable highperformance intermediate frequency or direct radio frequencymodulation for communication systems.The ADL5370 provides a greater than 500 MHz, 3 dB basebandbandwidth, making it ideally suited for use in broadband zeroIF or low IF-to-RF applications and in broadband digitalpredistortion transmitters.The ADL5370 accepts two differential baseband inputs and asingle-ended LO and generates a single-ended 50 Ω output.The ADL5370 is fabricated using the Analog Devices, Inc.advanced silicon-germanium bipolar process. It is available in a24-lead, exposed-paddle, Pb-free, LFCSP package. Performance isspecified over a −40°C to +85°C temperature range. A Pb-freeevaluation board is available.Applications Cellular communication systems at 450 MHz CDMA2000/GSM WiMAX/broadband wireless access systems Cable communication equipment Satellite modems

The ADL5372 is a member of the fixed-gain quadrature modulator(F-MOD) family designed for use from 1500 MHz to 2500 MHz.Its excellent phase accuracy and amplitude balance enable highperformance intermediate frequency or direct radio frequencymodulation for communication systems.The ADL5372 provides a >500 MHz, 3 dB baseband bandwidth,making it ideally suited for use in broadband zero IF or lowIF-to-RF applications and in broadband digital predistortiontransmitters. The ADL5372 accepts two differential baseband inputs and asingle-ended, local oscillator (LO) and generates a single-endedoutput.The ADL5372 is fabricated using the Analog Devices, Inc.,advanced silicon-germanium bipolar process. It is available ina 24-lead, exposed-paddle, RoHS compliant, LFCSP. Performanceis specified over a −40°C to +85°C temperature range. A RoHScompliant evaluation board is available. Applications Cellular communication systems: CDMA2000/GSM/WCDMA WiMAX/broadband wireless access systems Satellite modems

The ADL5387 is a broadband quadrature I/Q demodulator that covers an RF/IF input frequency range from 30 MHz to 2 GHz. With a NF = 13.2 dB, IP1dB = 12.7 dBm, and IIP3 = 32 dBm @ 450 MHz, the ADL5387 demodulator offers outstanding dynamic range suitable for the demanding infrastructure direct-conversion requirements. The differential RF/IF inputs provide a well-behaved broadband input impedance of 50 Ω and are best driven from a 1:1 balun for optimum performance.Ultrabroadband operation is achieved with a divide-by-2 method for local oscillator (LO) quadrature generation. Over a wide range of LO levels, excellent demodulation accuracy is achieved with amplitude and phase balances ~0.05 dB and ~0.4°, respectively. The demodulated in-phase (I) and quadrature (Q) differential outputs are fully buffered and provide a voltage conversion gain of >4 dB. The buffered baseband outputs are capable of driving a 2 Vp-p differential signal into 200 Ω.The fully balanced design minimizes effects from second-order distortion. The leakage from the LO port to the RF port is 60 dBm.The ADL5387 operates off a single 4.75 V to 5.25 V supply. The supply current is adjustable with an external resistor from the BIAS pin to ground.The ADL5387 is fabricated using the Analog Devices, Inc. advanced silicon-germanium bipolar process and is available in a 24-lead exposed paddle LFCSP.APPLICATIONS QAM/QPSK RF/IF demodulators W-CDMA/CDMA/CDMA2000/GSM Microwave point-to-(multi)point radios Broadband wireless and WiMAX Broadband CATVs