2-Channel, 12-Bit ADC with I2C Compatible Interface in 10-Lead MSOP Features: 12-Bit ADC with Fast Conversion Time: 2 µs Two Single-Ended Analog Input Channels Specified for VDD of 2.7 V to 5.5 V Low Power Consumption Fast Throughput Rate: - 188 kSPS Sequencer Operation Automatic Cycle Mode I2C® Compatible Serial Interface I2C® Interface supports: Standard, Fast, and High-Speed Modes Out of Range Indicator Pin-Selectable Addressing via AS Automatic Shutdown Mode: - 1 µA max

Precision Integrated Analog Front End, Controller, and PWM for Battery Test and Formation Systems Features: CC and CV battery test and formation modes with transparent and automatic switchover, for systems of 20 Ah or less Precise measurement of voltage and current Independent feedback control blocks Highly accurate, factory trimmed instrumentation and differential amplifiers In-amp for current sense gain: 66 V/V Difference amplifier for voltage sense gain: 0.4V/V Stable over temperature: offset voltage drift <0.6 µV/°C (maximum) Gain drift: <3 ppm/°C (maximum) Current sense CMRR: 120 dB minimum Popular SMPS control for charge/discharge High PWM linearity with internal ramp voltage 50 kHz to 300 kHz user controlled switching frequency Synchronization output or input with adjustable phase shift Programmable soft start

Programmable Transimpedance, Current to Bits Receiver Module Features: High performance, current input, data acquisition μModule that includes a TIA, analog filter, ADC driver, and ADC 3 selectable TZ settings: 2 k, 20 k, and 200 k Internal 1.8 V LDO for the ADC All passive components including supply decoupling Small form factor: 12.00 mm × 6.00 mm CSP_BGA Operation from a single 3.3 V supply Full-scale input current to 800 μA (TZ = 2 k) Fast input overload recovery High analog input current to 40 mAAnalog filter for noise reduction and antialias filtering Selectable 1.0 MHz and 100 MHz LPF bandwidth Low input referred current noise: 16 pA rms TZ = 200 k, 65,536 averages, 1 MHz analog filter Supports input pulse widths down to 10 ns 14-bit ADC with sample rate up to 125 MSPS Serial LVDS data output SPI control interface Quiescent power: 546 mW, LDO enabled Temperature range: 40C to +85C

SigmaDSP Digital Audio Processor Features: Qualified for automotive applications Fully programmable audio DSP for enhanced sound processing Features SigmaStudio, a proprietary graphical programming tool for the development of custom signal flows Clock oscillator for generating master clock from crystal Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V Up to 6144 SIMD instructions per sample at 48 kHz Up to 40 kWords of parameter/data RAM Up to 800 ms digital audio delay pool at 48 kHz Audio input/output and routing 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital input/output up to a sample rate of 192 kHz Flexible configuration for TDM, I2S, left and right justified formats, and PCM Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB DNR Stereo S/PDIF input and output Four PDM microphone input channels Multichannel, byte addressable, TDM serial ports Integer PLL and flexible clock generators Integrated die temperature sensor

4 ADC, 2 DAC Low-Power Codec with Audio Processor Features: Programmable audio processing engine 192 kHz processing path Biquad filters, limiters, volume controls, mixing Low latency, 24-bit ADCs and DACs 102 dB SNR (signal through PGA and ADC with A-weighted filter) 107 dB combined SNR (signal through DAC and headphone with A-weighted filter) Serial port sample rates from 8 kHz to 192 kHz 38 μs analog-to-analog latency Four single-ended analog inputs—configurable as microphone or line inputs Stereo analog audio output—single-ended or differential, configurable as either line output or headphone driver PLL supporting any input clock rate from 8 MHz to 27 MHz Full-duplex, asynchronous sample rate converters (ASRCs) See data sheet for additional features

Four-ADC, Two-DAC, Low Power Codec with Audio Processor Features: Programmable audio processing engine Fast (up to 768 kHz) and slow processing paths Biquad filters, limiters, volume controls, and mixing Low latency, 24-bit ADCs and DACs 102 dB SNR (through PGA and ADC with A weighted filter) 108 dB combined SNR (through DAC and headphone with A weighted filter) Serial port sampling rate from 8 kHz to 192 kHz 5 μs analog-to-analog latency 4 single-ended analog inputs, configurable as microphone or line inputs Dual stereo digital microphone inputs Stereo analog audio output, single-ended or differential, configurable as either line output or headphone driver PLL supporting any input clock rate from 8 MHz to 27 MHz Full duplex, asynchronous sample rate converters (ASRCs) Power supplies Analog and digital input/output of 1.8 V to 3.3 V Digital signal processing (DSP) core of 1.1 V to 1.8 V Low power I2C and SPI control interfaces, self boot from I2C EEPROM 7 multipurpose (MPx) pins for digital controls and outputs

Three ADCs, One DAC, Low Power Codec with Audio/FastDSP Features: Programmable FastDSP audio processing engine Up to 768 kHz sample rate Biquad filters, limiters, volume controls, mixing Low latency, 24-bit ADCs and DAC 106 dB SNR (signal through ADC with A-weighted filter) 110 dB combined SNR (signal through DAC and headphone with A-weighted filter) Serial port sample rates from 8 kHz to 768 kHz 5 μs analog-to-analog group delay Programmable, double precision MAC engine for 13-stage equalizer 3 analog inputs (2 differential and 1 single-ended), configurable as microphone or line inputs Analog differential audio output, configurable as either line output or headphone driver PLL supporting any input clock rate from 30 kHz to 27 MHz 1-channel ASRCI, 3-channel ASRCO Serial audio ports supporting I2S, left justified, or up to 16-channel TDM (TDM16) 2 interpolators and 4 decimators with flexible routing Power supplies Analog AVDD at 1.8 V Digital I/O IOVDD at 1.8 V to 3.3 V Headphone HPVDD at 1.8 V Headphone HPVDD_L at 1.2 V to1.8 V Control/communication interfaces I2C, SPI, or UART 28-ball, 0.4 mm pitch, 2.957 mm × 1.757 mm WLCSP

Ultrafast 3.3 V Single-Supply Comparator w/CML Output Drivers Features: 3.3 V/5.2 V single-supply operation 150 ps propagation delay 15 ps overdrive and slew rate dispersion 8 GHz equivalent input rise time bandwidth 80 ps minimum pulse width 35 ps typical output rise/fall 10 ps deterministic jitter (DJ) 200 fs random jitter (RJ) On-chip terminations at both input pins Robust inputs with no output phase reversal Resistor-programmable hysteresis Differential latch control Extended industrial −40°C to +125°C temperature range

500mA Power Op Amp with Adjustable Precision Current Limit Features: ±500mA Minimum Output Current Independent Adjustment of Source and Sink Current Limits 1% Current Limit Accuracy Improved Reactive Load Driving Stability Operates with Single or Split Supplies Shutdown/Enable Control Input Open-Collector Status Flags: Sink Current Limit Source Current Limit Thermal Shutdown Fail-Safe Current Limit and Thermal Shutdown 1.6V/μs Slew Rate 3.6MHz Gain-Bandwidth Product Specified Temperature Range: –40°C to 85°C Available in a 20-Lead TSSOP Package

Single-Supply, Multichannel, 125 kSPS, 24-Bit, Sigma-Delta ADC with 10 V Inputs Features:24-bit ADC with integrated AFEFast and flexible output rate: 2.5 SPS to 125 kSPSChannel scan data rate of 24,845 SPS per channel (40.25 s settling)85 dB common mode rejection of 50 Hz and 60 Hz at 20 SPS per channel10 V inputs, either 8 differential or 16 single-endedVIN pin absolute maximum rating 65 VAbsolute input pin voltage up to 20 VMinimum 1 M impedanceOn-chip 2.5 V reference0.12% initial accuracy at 25C, 5 ppm/C (typical) driftInternal or external clockPower suppliesAVDD = 4.5 V to 5.5 VIOVDD = 2 V to 5.5 VTotal current consumption AVDD + IOVDD (IDD) = 10.4 mATemperature range: 40C to +105C3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)SPI, QSPI, MICROWIRE, and DSP compatible