Low Cost, General-Purpose High Speed JFET Amplifier Features: High Speed 41 MHz, -3 dB bandwidth 125 V/µs slew rate 80 ns settling time Input bias current of 20 pA and noise current of 10 fA/√Hz Fully specified power supplies: ±5 V to ±15V Input voltage noise of 12 nV/√Hz Low distortion: -76 dB at 1 MHz High output drive capability Drives unlimited capacitance load 50 mA min output current No phase reversal when input is at rail Available in 8-lead SOIC

2-Channel, 12-Bit ADC with I2C Compatible Interface in 10-Lead MSOP Features: 12-Bit ADC with Fast Conversion Time: 2 µs Two Single-Ended Analog Input Channels Specified for VDD of 2.7 V to 5.5 V Low Power Consumption Fast Throughput Rate: - 188 kSPS Sequencer Operation Automatic Cycle Mode I2C® Compatible Serial Interface I2C® Interface supports: Standard, Fast, and High-Speed Modes Out of Range Indicator Pin-Selectable Addressing via AS Automatic Shutdown Mode: - 1 µA max

High Performance, Low Power, Rail-to-Rail Precision Instrumentation Amplifier Features: Low power: 330 μA maximum quiescent current Rail-to-rail output Low noise and distortion 8 nV/√Hz maximum input voltage noise at 1 kHz 0.15 μV p-p RTI noise (G = 100) 0.5 ppm nonlinearity with 2 kΩ load (G = 1) Excellent ac specifications 80 dB minimum CMRR at 10 kHz (G = 1) 2.2 MHz bandwidth (G = 1) High precision dc performance (AD8422BRZ) 150 dB minimum CMRR (G = 1000) 0.04% maximum gain error (G = 1000) 0.3 μV/°C maximum input offset drift 0.5 nA maximum input bias current Wide supply range 4.6 V to 36 V single supply ±2.3 V to ±18 V dual supply Input overvoltage protection: 40 V from opposite supply Gain range: 1 to 1000 Available in 8-lead LFCSP, 8-lead MSOP, and 8-lead SOIC_N

Single Channel, 16-Bit Current/Voltage Output DAC with HART Connectivity Features: 16-bit resolution and monotonicity Current or voltage output available on a single terminal Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA, 0 mA to 24 mA, ±20 mA, ±24 mA, and −1 mA to +22 mA Voltage output ranges (with 20% overrange): 0 V to 5 V, 0 V to 10 V, ±5 V, and ±10 V User programmable offset and gain Advanced on-chip diagnostics, including a 12-bit ADC On-chip reference −40°C to +115°C temperature range 32-Lead, 5 mm × 5 mm LFCSP package

16-Channel, 12-/16-Bit nanoDAC+ with 2 ppm/C Voltage Reference TC, I2C Interface Features: High relative accuracy (INL): ±4 LSB maximum at 16 bits (AD5677R only) TUE: ±0.14% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.06% of FSR maximum Low drift, 2.5 V voltage reference TC: 2 ppm/°C typical 40 mA short-circuit current Wide operating ranges −40°C to +125°C temperature range 2.7 V to 5.5 V power supply range Simplified implementation User selectable gain of 1 or 2 (GAIN pin) 1.8 V logic compatibility 400 kHz I2C-compatible serial interface 28-lead, 4 mm × 4 mm, RoHS compliant LFCSP

Single-Supply, Multichannel, 125 kSPS, 24-Bit, Sigma-Delta ADC with 10 V Inputs Features:24-bit ADC with integrated AFEFast and flexible output rate: 2.5 SPS to 125 kSPSChannel scan data rate of 24,845 SPS per channel (40.25 s settling)85 dB common mode rejection of 50 Hz and 60 Hz at 20 SPS per channel10 V inputs, either 8 differential or 16 single-endedVIN pin absolute maximum rating 65 VAbsolute input pin voltage up to 20 VMinimum 1 M impedanceOn-chip 2.5 V reference0.12% initial accuracy at 25C, 5 ppm/C (typical) driftInternal or external clockPower suppliesAVDD = 4.5 V to 5.5 VIOVDD = 2 V to 5.5 VTotal current consumption AVDD + IOVDD (IDD) = 10.4 mATemperature range: 40C to +105C3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)SPI, QSPI, MICROWIRE, and DSP compatible

32 A, Ultra Low Power, 24-Bit Sigma-Delta ADC with Integrated PGA and FIFO Features: Ultralow current consumption (typical): 32 μA: continuous conversion mode (gain = 128) 5 μA: duty cycling mode (ratio = 1/16) 0.5 μA: standby mode 0.1 μA: power-down mode Built-in features for system level power savings: Current saving duty cycle ratio: 1/4 or 1/16 Smart sequencer and per channel configuration minimizes host processor load Deep embedded FIFO minimizes host processor load (depth of 256 samples) Autonomous FIFO interrupt functionality, threshold detection Single supply as low as 1.71 V increasing battery length RMS noise: 25 nV rms at 1.17 SPS (gain = 128) – 48 nV/√Hz Up to 22 noise free bits (gain = 1) Output data rate: 1.17 SPS to 2.4 kSPS Operates from 1.71 V to 3.6 V single supply or ±1.8 V split supplies Band gap reference with 15 ppm/°C maximum drift PGA with rail-to-rail analog input Adaptable sensor interfacing functionality: Matched programmable excitation currents for RTDs On-chip bias voltage generator for thermocouples Low-side power switch for bridge transducers Sensor open wire detection Internal temperature sensor and oscillator Self and system calibration Flexible filter options Simultaneous 50 Hz/60 Hz rejection (on selected filter options) General-purpose outputs Diagnostic functionality Crosspoint multiplexed inputs 8 differential/16 pseudo differential inputs 5 MHz SPI (3-wire or 4-wire) Available in 35-ball, 2.74 mm × 3.6 mm WLCSP Temperature range: −40°C to +105°C

GaAs MMIC I/Q Downconverter, 17 - 24 GHz Features: Conversion Gain: 12 dB Image Rejection: 30 dB 2 LO to RF Isolation: 45 dB Noise Figure: 3 dB Input IP3: 0 dBm 32 Lead 5x5mm SMT Package: 25mm2

16-Bit, Isolated Sigma-Delta Modulator Features: 5 MHz to 20 MHz external clock input rate 16 bits, no missing codes Signal to noise ratio (SNR): 88 dB (typical) Effective number of bits (ENOB): 14.2 bits typical Typical offset drift vs. temperature: 1.6 μV/°C typical On-board digital isolator On-board reference See data sheet for additional featuresAD7403-EP supports defense and aerospace applications (AQEC standard) Download AD7403-EP data sheet Military temperature range: −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/16625 DSCC Drawing Number

16-Bit, 16-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADC Features: Easy Drive Reduced analog input and reference drive requirements On-chip reference buffer (WLCSP only) Overvoltage protection up to 5 mA on each analog input Long acquisition phase, ≥71.5% (715 ns/1000 ns) of cycle time at 1 MSPS High performance Sample rate: 500 kSPS (AD4695) or 1 MSPS (AD4696) INL: ±1.0 LSB maximum Guaranteed 16-bit, no missing codes SINAD: 93 dB typical, fIN = 1 kHz Oversampled dynamic range: 111.2 dB, OSR = 64 Small footprint, high channel density 32-lead 5 mm × 5 mm LFCSP 36-ball 2.96 mm × 2.96 mm WLCSP Easy Drive features support system level designs with fewer components Enhanced digital functionality First conversion accurate, no latency or pipeline delay Fast conversion time and dual-/quad-SDO modes allow low SPI clock rates Customizable channel sequencer On-chip oversampling and decimation Threshold detection alerts Offset and gain correction Autonomous conversion (autocycle) mode 1.14 V to 1.98 V logic SPI Low power 8 mW at fS = 1 MSPS and 4 mW at fS = 500 kSPS 4 μW standby power dissipation with the internal LDO disabled Internal LDO enables 3.15 V to 5.5 V, single analog supply operation Wide operating temperature range: −40°C to +125°C