The AD5530 / AD5531 are single 12- and 14-bit (respectively) serial input, voltage output digital-to-analog converters (DAC).They utilize a versatile 3-wire interface that is compatible with SPI®, QSPI™, MICROWIRE™, and DSP interface standards. Data is presented to the part in a 16-bit serial word format. Serial data is available on the SDO pin for daisy-chaining purposes. Data readback allows the user to read the contents of the DAC register via the SDO pin.The DAC output is buffered by a gain of two amplifier and referenced to the potential at DUTGND. LDAC can be used to update the output of the DAC asynchronously. A power-down pin (PD) allows the DAC to be put into a low power state, and a CLR pin allows the output to be cleared to a user-defined voltage, the potential at DUTGND.The AD5530 / AD5531 are available in 16-lead TSSOP.APPLICATIONS Industrial automation Automatic test equipment Process control General-purpose instrumentation

The AD5623R/AD5643R/AD5663R, members of the nanoDAC® family, are low power, dual 12-, 14-, and 16-bit buffered voltage-out digital-to-analog converters (DAC) that operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The AD5623R/AD5643R/AD5663R have an on-chip reference. The AD5623R-3/AD5643R-3/AD5663R-3 have a 1.25 V, 5 ppm/°C reference, giving a full-scale output of 2.5 V; and the AD5623R-5/ AD5643R-5/AD5663R-5 have a 2.5 V, 5 ppm/°C reference, giving a full-scale output of 5 V. The on-chip reference is off at power-up, allowing the use of an external reference; and all devices can be operated from a single 2.7 V to 5.5 V supply. The internal reference is turned on by writing to the DAC.The parts incorporate a power-on reset circuit that ensures the DAC output powers up to 0 V and remains there until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 480 nA at 5 V and provides software-selectable output loads while in power-down mode.The low power consumption of this part in normal operation makes it ideally suited to portable, battery-operated equipment.The AD5623R/AD5643R/AD5663R use a versatile, 3-wire serial interface that operates at clock rates up to 50 MHz, and they arecompatible with standard SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The on-chip precision output amplifier enables rail-to-rail output swing to be achieved.Product Highlights Dual 12-, 14-, and 16-bit DAC. On-chip 1.25 V/2.5 V, 5 ppm/°C reference. Available in 10-lead MSOP and 10-lead, 3 mm × 3 mm LFCSP. Low power; typically consumes 0.6 mW at 3 V and 1.25 mW at 5 V. 4.5 μs maximum settling time for the AD5623R.Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5625R/AD5645R/AD5665R and AD5625/AD5665 members of the nanoDAC® family are low power, quad, 12-/14-/16-bit, buffered voltage-out DACs with/without an on-chip reference. All devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and have an I2C-compatible serial interface.The AD5625R/AD5645R/AD5665R have an on-chip reference. The LFCSP versions of the AD5625R/AD5645R/AD5665R have a 1.25 V or 2.5 V, 10 ppm/°C reference, giving a full-scale output range of 2.5 V or 5 V; the TSSOP versions of the AD5625R/AD5645R/AD5665R have a 2.5 V, 5 ppm/°C reference, giving a full-scale output range of 5 V. The WLCSP has a 1.25 V reference. The on-chip reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write. The AD5625/AD5665 require an external reference voltage to set the output range of the DAC.The device incorporates a power-on reset circuit that ensures that the DAC output powers up to 0 V (POR = GND) or midscale (POR = VDD) and remains there until a valid write occurs. The on-chip precision output amplifier enables rail-to-rail output swing.The AD5625R/AD5645R/AD5665R and AD5625/AD5665 use a 2-wire I2C-compatible serial interface that operates in standard (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes.Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5641, a member of the nanoDAC® family, is a single, 14-bit, buffered, voltage-out DAC that operates from a single 2.7 V to 5.5 V supply, typically consuming 75 μA at 5 V. The part comes in a tiny LFCSP and SC70 packages. Its on-chip precision output amplifier allows rail-to-rail output swing to be achieved. The AD5641 uses a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The reference for AD5641 is derived from the power supply inputs and, therefore, gives the widest dynamic output range. The part incorporates a power-on reset circuit, which ensures that the DAC output powers up to 0 V and remains there until a valid write to the device takes place.The AD5641 contains a power-down feature that reduces current consumption typically to 0.2 μA at 3 V, and provides software-selectable output loads while in power-down mode. The part is put into power-down mode over the serial interface. The low power consumption of the part in normal operation makes it ideally suited to portable battery-operated equipment. The combination of small package and low power makes this nanoDAC device ideal for level-setting requirements such as generating bias or control voltages in space-constrained and power-sensitive applications.PRODUCT HIGHLIGHTS Available in a space-saving, 6-lead LFCSP and SC70 packages. Low power, single-supply operation. The AD5641 operates from a single 2.7 V to 5.5 V supply and with a maximum current consumption of 100 μA, making it ideal for battery-powered applications. The on-chip output buffer amplifier allows the output of the DAC to swing rail-to-rail with a typical slew rate of 0.5 V/μs. Reference derived from the power supply. High speed serial interface with clock speeds up to 30 MHz. Designed for very low power consumption. The interface powers up only during a write cycle. Power-down capability. When powered down, the DAC typically consumes 0.2 μA at 3 V. Power-on reset with brownout detection. APPLICATIONS Voltage level setting Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5625R/AD5645R/AD5665R and AD5625/AD5665 members of the nanoDAC® family are low power, quad, 12-/14-/16-bit, buffered voltage-out DACs with/without an on-chip reference. All devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and have an I2C-compatible serial interface.The AD5625R/AD5645R/AD5665R have an on-chip reference. The LFCSP versions of the AD5625R/AD5645R/AD5665R have a 1.25 V or 2.5 V, 10 ppm/°C reference, giving a full-scale output range of 2.5 V or 5 V; the TSSOP versions of the AD5625R/AD5645R/AD5665R have a 2.5 V, 5 ppm/°C reference, giving a full-scale output range of 5 V. The WLCSP has a 1.25 V reference. The on-chip reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write. The AD5625/AD5665 require an external reference voltage to set the output range of the DAC.The device incorporates a power-on reset circuit that ensures that the DAC output powers up to 0 V (POR = GND) or midscale (POR = VDD) and remains there until a valid write occurs. The on-chip precision output amplifier enables rail-to-rail output swing.The AD5625R/AD5645R/AD5665R and AD5625/AD5665 use a 2-wire I2C-compatible serial interface that operates in standard (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes.Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5625R/AD5645R/AD5665R and AD5625/AD5665 members of the nanoDAC® family are low power, quad, 12-/14-/16-bit, buffered voltage-out DACs with/without an on-chip reference. All devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and have an I2C-compatible serial interface.The AD5625R/AD5645R/AD5665R have an on-chip reference. The LFCSP versions of the AD5625R/AD5645R/AD5665R have a 1.25 V or 2.5 V, 10 ppm/°C reference, giving a full-scale output range of 2.5 V or 5 V; the TSSOP versions of the AD5625R/AD5645R/AD5665R have a 2.5 V, 5 ppm/°C reference, giving a full-scale output range of 5 V. The WLCSP has a 1.25 V reference. The on-chip reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write. The AD5625/AD5665 require an external reference voltage to set the output range of the DAC.The device incorporates a power-on reset circuit that ensures that the DAC output powers up to 0 V (POR = GND) or midscale (POR = VDD) and remains there until a valid write occurs. The on-chip precision output amplifier enables rail-to-rail output swing.The AD5625R/AD5645R/AD5665R and AD5625/AD5665 use a 2-wire I2C-compatible serial interface that operates in standard (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes.Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The ADM1064 Super Sequencer® is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1064 integrates a 12-bit ADC that can be used to accurately read back up to 12 separate voltages. The device also provides up to 10 programmable inputs for moni-toring undervoltage faults, overvoltage faults, or out-of-window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can provide up to a 12 V output for driving the gate of an N-FET that can be placed in the path of a supply. ApplicationsCentral office systemsServers/routersMultivoltage system line cardsDSP/FPGA supply sequencingIn-circuit testing of margined supplies

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ‘Wait Start’state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ‘Power Up Done’ statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1192 is an integrated current sense amplifier that offers digital current and voltage monitoring via an on-chip, 12-bit analog-to-digital converter (ADC), communicated through an I2C interface.An internal current sense amplifier senses voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.A 12-bit ADC can measure the current seen in the sense resistor and in the supply voltage on the VCC pin. An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on the way the ADR pin is connected.A SETV pin is also included. A voltage applied to this pin is internally compared to the output voltage on the current sense amplifier. The output of the SETV comparator asserts when the current sense amplifier output exceeds the SETV voltage. This event is detected at the ALERT block. The ALERT block then charges up the external TIMER capacitor with a fixed current. When this timing cycle is complete, the ALERT output asserts.The ALERT output can be used as a flag to warn a micro-controller or field programmable gate array (FPGA) of an overcurrent condition. ALERT outputs of multiple ADM1192 devices can be tied together and used as a combined alert.A basic P-channel FET hot swap circuit can be implemented with the ALERT output. The value of the TIMER capacitor should be set so that the charging time of this capacitor is much longer than the period where a higher than nominal inrush current may be flowing.The ADM1192 is packaged in a 10-lead MSOP.APPLICATIONS Power monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

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