The AD9629 is a monolithic, single channel 1.8 V supply, 12-bit, 20 MSPS/40 MSPS/65MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input with optional 1, 2, or 4 divide ratios controls all internal conversion cycles.The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported.The AD9629 is available in a 32-lead RoHS compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).Applications Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA Smart antenna systems Battery-powered instruments Hand held scope meters Portable medical imaging Ultrasound Radar/LIDAR PET/SPECT imagingProduct Highlights1. The AD9629 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.2. The sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.3. A standard serial port interface (SPI) supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO and data output (D11 to D0) timing and offset adjustments, and voltage reference modes.4. The AD9629 is packaged in a 32-lead RoHS compliant LFCSP that is pin compatible with the AD9609 10-bit ADC and the AD9649 14-bit ADC, enabling a simple migration path between 10-bit and 14-bit converters sampling from 20 MSPS to 80 MSPS.

The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/ 105 MSPS analog-to-digital converter (ADC) designed for digitizing high frequency, wide dynamic range signals with input frequencies of up to 300 MHz.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers, and shared integrated voltage reference, which eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9650 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and test modes. Pin compatible with the AD9268 and other dual families, AD9269, AD9251, AD9231, and AD9204. This allows a simple migration across resolutions and bandwidth. APPLICATIONS Industrial instrumentation X-Ray, MRI, and ultrasound equipment High speed pulse acquisition Chemical and spectrum analysis Direct conversion receivers Multimode digital receivers Smart antenna systems General-purpose software radios

The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/ 105 MSPS analog-to-digital converter (ADC) designed for digitizing high frequency, wide dynamic range signals with input frequencies of up to 300 MHz.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers, and shared integrated voltage reference, which eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9650 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and test modes. Pin compatible with the AD9268 and other dual families, AD9269, AD9251, AD9231, and AD9204. This allows a simple migration across resolutions and bandwidth. APPLICATIONS Industrial instrumentation X-Ray, MRI, and ultrasound equipment High speed pulse acquisition Chemical and spectrum analysis Direct conversion receivers Multimode digital receivers Smart antenna systems General-purpose software radios

The ADG5204 is a complementary metal oxide semiconductor (CMOS) analog multiplexer, comprising four single channels.The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed together with high signal bandwidth make the ADG5204 suitable for video signal switching. The ADG5204 is designed on a trench process, which guards against latch-up. A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions.The ADG5204 switches one of four inputs to a common output, D, as determined by the 3-bit binary address lines, A0, A1, and EN. Logic 0 on the EN pin disables the device. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action.APPLICATIONS Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systemsPRODUCT HIGHLIGHTS Trench Isolation Guards Against Latch-Up. A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions. Ultralow capacitance and < 1 pC charge injection. Dual-Supply Operation. For applications where the analog signal is bipolar, the ADG5204 can be operated from dual supplies up to ±22 V. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG5204 can be operated from a single rail power supply up to 40 V. 3 V Logic Compatible Digital Inputs. VINH = 2.0 V, VINL = 0.8 V. No VL Logic Power Supply Required.

The ADG5206 is a monolithic CMOS analog multiplexer comprising sixteen single channels. The ADG5206 switches one of sixteen inputs to a common output, as determined by the 4-bit binary address lines, A0, A1, A2, and A3.An EN input enables or disables the device. When EN is low, the device is disabled, and all channels switch off. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed coupled with high signal bandwidth make these devices suitable for video signal switching.Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked.The ADG5206 does not have a VL pin; instead, the logic power supply is generated internally by an on-chip voltage generator.APPLICATIONS Automatic test equipment Data acquisition Instrumentation Avionics Battery Monitoring Communication systemsPRODUCT HIGHLIGHTS Trench Isolation Guards Against Latch-Up. A dielectric trench separates the P and N channel transistors to prevent latch-up even under severe overvoltage conditions. Optimal switch design for low charge injection, low switch capacitance and low leakage currents The ADG5206 achieves 8 kV HBM ESD specification on all external pins Dual-Supply Operation. For applications where the analog signal is bipolar, the ADG5206 can be operated from dual supplies of up to ±22 V. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG5206 can be operated from a single rail power supply of up to 40 V.

The ADG5208/ADG5209 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG5208 switches one of eight inputs to a common output, as determined by the 3-bit binary address lines, A0, A1, and A2. The ADG5209 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines, A0 and A1.An EN input on both devices enables or disables the device. When EN is disabled, all channels switch off. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed coupled with high signal bandwidth make these devices suitable for video signal switching.Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked.The ADG5208/ADG5209 do not have VL pins; instead, the logic power supply is generated internally by an on-chip voltage generator.Product Highlights Trench Isolation Guards Against Latch-Up. A dielectric trench separates the P and N channel transistors to prevent latch-up even under severe overvoltage conditions. 0.4 pC Charge Injection. Dual-Supply Operation. For applications where the analog signal is bipolar, the  ADG5208/ADG5209 can be operated from dual supplies of up to ±22 V. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG5208/ADG5209 can be operated from a single rail power supply of up to 40 V. 3 V Logic-Compatible Digital Inputs. VINH = 2.0 V, VINL = 0.8 V. No VL Logic Power Supply Required.Applications Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

The ADG5212 / ADG5213 contain four independent single-pole/single-throw (SPST) switches. The ADG5212 switches turn on with Logic 1. The ADG5213 has two switches with digital control logic similar to that of the ADG5212; however, the logic is inverted on the other two switches. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.The ADG5212 and ADG5213 do not have a VL pin. The digital inputs are compatible with 3 V logic inputs over the full operating supply range. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed together with high signal bandwidth make the parts suitable for video signal switching.APPLICATIONS Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systemsPRODUCT HIGLIGHHTS Trench Isolation Guards Against Latch-Up. A dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions. Ultralow capacitance and < 1 pC charge injection. Dual-Supply Operation. For applications where the analog signal is bipolar, the ADG5212 / ADG5213 can be operated from dual supplies up to ±22V. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG5212 / ADG5213 can be operated from a single rail power supply up to 40 V. 3 V Logic Compatible Digital Inputs. VINH = 2.0 V, VINL = 0.8 V. No VL Logic Power Supply Required.

The ADG5233 and ADG5234 are monolithic industrial CMOS analog switches comprising three independently selectable single-pole, double throw (SPDT) switches and four independently selectable SPDT switches, respectively.All channels exhibit break-before-make switching action that prevents momentary shorting when switching channels. An EN input on the ADG5233 (LFCSP and TSSOP packages) is used to enable or disable the device. When disabled, all channels are switched off.The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed coupled with high signal bandwidth make these devices suitable for video signal switching.APPLICATIONS Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systemsPRODUCT HIGHLIGHTS Trench Isolation Guards Against Latch-Up. A dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions. Ultralow Capacitance and −0.6 pC Charge Injection. Dual-Supply Operation. For applications where the analog signal is bipolar, the ADG5233/ADG5234 can be operated from dual supplies up to ±22 V. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG5233/ADG5234 can be operated from a single-rail power supply up to 40 V. 3 V Logic-Compatible Digital Inputs. VINH = 2.0 V, VINL = 0.8 V. No VL Logic Power Supply Required.

The ADG5419 is a monolithic industrial CMOS analog switch containing a latch-up immune single-pole/double-throw (SPDT) switch. An EN input on the LFCSP package is used to enable or disable the device. When disabled, all channels are switched off.Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked. The ADG5419 exhibits break-before-make switching action for use in multiplexer applications.The ultralow on resistance and on-resistance flatness of these switches make them ideal solutions for data acquisition and gain switching applications, where low distortion is critical. The latch-up immune construction, and high ESD rating, makes these switches more robust in harsh environments.PRODUCT HIGHLIGHTS Trench isolation guards against latch-up. A dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions. Low RON. Dual-supply operation. For applications where the analog signal is bipolar, the ADG5419 can be operated from dual supplies up to ±22 V. Single-supply operation. For applications where the analog signal is unipolar, the ADG5419 can be operated from a single-rail power supply up to 40 V. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required.APPLICATIONS High voltage signal routing Automatic test equipment Analog front-end circuits Precision data acquisition Industrial Instrumentation Amplifier gain select Relay replacement

The ADL5324 incorporates a dynamically adjustable biasing circuit that allows for the customization of OIP3 and P1dB performance from 3.3 V to 5 V, without the need for an external bias resistor. This feature gives the designer the ability to tailor driver amplifier performance to the specific needs of the design. This feature also creates the opportunity for dynamic biasing of the driver amplifier where a variable supply is used to allow for full 5 V biasing under large signal conditions, and then reduced supply voltage when signal levels are smaller and lower power consumption is desirable. This scalability reduces the need to evaluate and inventory multiple driver amplifiers for different output power requirements, from 25 dBm to 29 dBm output power levels.The ADL5324 is also rated to operate across the wide temperature range of −40°C to +105°C for reliable performance in designs that experience higher temperatures, such as power amplifiers. The ½ W driver amplifier also covers the wide frequency range of 400 MHz to 4000 MHz, and only requiresa few external components to be tuned to a specific band within that wide range. This high performance broadband RF driver amplifier is well suited for a variety of wired and wireless applications, including cellular infrastructure, ISM band power amplifiers, defense equipment, and instrumentation equipment. A fully populated evaluation board is available.The ADL5324 also delivers excellent ACPR vs. output power and bias voltage. The driver can deliver greater than 17 dBm of output power at 2140 MHz, while achieving an ACPR of −55 dBc at 5 V. If the bias is reduced to 3.3 V, the −55 dBc ACPR output power only minimally reduces to 15 dBm.Applications Wireless infrastructure Automated test equipment ISM/AMR applications