The ADRF5043 is a nonreflective, SP4T switch manufactured in the silicon on insulator (SOI) process.The ADRF5043 operates from 9 kHz to 44 GHz with an insertion loss of lower than 2.5 dB and an isolation of higher than 36 dB. The device has a RF input power handling capability of 24 dBm for both through and terminated paths.The ADRF5043 requires a dual-supply voltage of +3.3 V and ?3.3 V. The device employs CMOS- and low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5043 has enable and logic select controls to feature all off state and port mirroring, respectively. The ADRF5043 is pin compatible with the ADRF5042 fast switching version, which operates from 100 MHz to 44 GHz.The ADRF5043 comes in a 24-terminal, 3 mm ? 3 mm, RoHS compliant, land grid array (LGA) package and can operate from ?40?C to +105?C.Applications Industrial Scanners Test instrumentation Cellular infrastructure?millimeterwave (mmWave) 5G Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF5044 is a general-purpose, single-pole, four-throw (SP4T) switch manufactured using a silicon process. It comes in a 24-terminal land grid array (LGA) package and provides high isolation and low insertion loss from 100 MHz to 30 GHz.This broadband switch requires dual-supply voltages, +3.3 V and ?3.3 V, and provides complementary metal-oxide semiconductor (CMOS)/low voltage transistor-transistor logic (LVTTL) logic-compatible control.Applications Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, and electronic counter measures (ECMs) Broadband telecommunications systems

The ADRF6821 is a highly integrated, dual radio frequency (RF) input, zero intermediate frequency (IF)/low IF RFIC receiverwith a quadrature demodulator, digital step attenuator (DSA),IF linear amplifiers, an integrated, fractional-N phase-locked loop (PLL), and a low phase noise, multicore, voltage controlled oscillator (VCO). The RFIC is ideally suited for communication digital predistortion (DPD) systems.The high isolation 2:1 RF switch and on-chip wideband RFbalun enable the ADRF6821 to support two single-ended, 50 ? terminated RF inputs. A programmable attenuator ensures anoptimal differential RF input level to the high linearity demodulatorcore. The integrated attenuator offers an attenuation range of 15 dB with a step size of 1 dB. High linearity IF amplifiers follow the demodulator and provide an interface to the next componentin the chain, typically an analog-to-digital converter (ADC).The ADRF6821 offers two alternatives for generating thedifferential local oscillator (LO) input signal: internally viathe on-chip fractional-N synthesizer with low phase noiseVCOs or externally via a low phase noise LO signal. Theintegrated synthesizer enables continuous LO coverage from 450 MHz to 2800 MHz. The PLL reference input supports awide frequency range and includes integrated reference dividers before the phase frequency detector (PFD).When selected, the output of the internal fractional-N synthesizeris applied to a divide by 2, quadrature phase splitter. From theexternal LO path, a 2? LO signal can be used with the divide by 2,quadrature phase splitter to generate the quadrature LO inputs to the mixers.The ADRF6821 is fabricated using an advanced silicon germanium(SiGe), bipolar complementary metal oxide semiconductor(BiCMOS) process. It is available in a 56-lead, RoHS compliant,8 mm ? 8 mm LFCSP package with an exposed pad. Performanceis specified over the ?40?C to +105?C case temperature range.Applications Cellular W-CDMA/GSM/LTE DPD receivers? Microwave, point to point radios

The ADRV9008-2 is a highly integrated, RF agile transmit subsystem offering dual channel transmitters, observation path receiver, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption demanded by 2G, 3G and 4G macro-cell base stations, and active antenna, applications.The transmitters use an innovative direct conversion modulator that achieves multi-carrier macro-base-station quality performance and very low power. In 3G/4G mode, the maximum large-signal bandwidth is 200MHz. In MC-GSM mode, which has higher in-band SFDR, the maximum large-signal bandwidth is 75MHz.The observation path consists of a wide bandwidth direct-conversion receiver with state-of-the-art dynamic range. The complete receive subsystem includes dc offset correction, quadrature correction, and digital filtering thus eliminating the need for these functions in the digital baseband. Several auxiliary functions such as ADCs, DACs, and GPIOs for PA and RF-front-end control are also integrated. The fully integrated phase locked loops (PLLs) provide high performance, low power fractional-N RF frequency synthesis for the transmitter and receiver sections. An additional synthesizer is used to generate the clocks needed for the converters, digital circuits, and the serial interface. Special precautions have been taken to provide the isolation demanded in high performance base station applications. All VCO and loop filter components are integrated.The high-speed JESD204B interface supports up to 12.288 Gbps lane rates resulting in two lanes per transmitter in the widest bandwidth mode and two lanes for the observation path receiver in the widest bandwidth mode. The core of the ADRV9008-2 can be powered directly from 1.3 V and 1.8 V regulators and is controlled via a standard 4 wire serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9008-2 is packaged in a 12mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).

The AD9371 is a highly integrated, wideband RF transceiveroffering dual channel transmitters and receivers, integrated synthesizers, and digital signal processing functions. The ICdelivers a versatile combination of high performance and low power consumption required by 3G/4G micro and macro BTSequipment in both FDD and TDD applications. The AD9371operates from 300 MHz to 6000 MHz, covering most of the licensed and unlicensed cellular bands. The IC supports receiver bandwidths up to 100 MHz. It also supports observation receiver and transmit synthesis bandwidths up to 250 MHz to accommodate digital correction algorithms.The transceiver consists of wideband direct conversion signalpaths with state-of-the-art noise figure and linearity. Each complete receiver and transmitter subsystem includes dc offset correction, quadrature error correction (QEC), and programmable digitalfilters, eliminating the need for these functions in the digitalbaseband. Several auxiliary functions such as an auxiliary analog-to-digital converter (ADC), auxiliary digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) are integratedto provide additional monitoring and control capability.An observation receiver channel with two inputs is included to monitor each transmitter output and implement interference mitigation and calibration applications. This channel also connects to three sniffer receiver inputs that can monitor radio activity in different bands.The high speed JESD204B interface supports lane rates up to 6144 Mbps. Four lanes are dedicated to the transmitters and four lanes are dedicated to the receiver and observation receiver channels.The fully integrated phase-locked loops (PLLs) provide high performance, low power fractional-N frequency synthesis forthe transmitter, the receiver, the observation receiver, and theclock sections. Careful design and layout techniques provide theisolation demanded in high performance base station applications.All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count. A 1.3 V supply is required to power the core of the AD9371, anda standard 4-wire serial port controls it. Other voltage supplies provide proper digital interface levels and optimize transmitterand auxiliary converter performance. The AD9371 is packaged in a12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G/4G micro and macro base stations (BTS) 3G/4G multicarrier picocells? FDD and TDD active antenna systems? Microwave, nonline of sight (NLOS) backhaul systems

The ADXL213 is a low cost, low power, complete dual axis accelerometer with signal conditioned, duty cycle modulated outputs, all on a single monolithic IC. The ADXL213 measures acceleration with a full-scale range of ?1.2 g (typical). The ADXL213 can measure both dynamic acceleration (e.g., vibration) and static acceleration (e.g., gravity).The outputs are digital signals whose duty cycles (ratio of pulse width to period) are proportional to acceleration (30%/g). The duty cycle outputs can be directly measured by a microcontroller without an A/D converter or glue logic.Innovative design techniques are used to ensure high zero g bias stability (typically better than 0.25 mg/?C), as well as tight sensitivity stability (typically better than 50 ppm/?C).The typical noise floor is 160 ?g/?, allowing signals below 1 mg (0.06? of inclination) to be resolved in tilt sensing applications using narrow bandwidths (The user selects the bandwidth of the accelerometer usingcapacitors CX and CYM at the XFILT and YFILT pins. Bandwidths of0.5 Hz to 250 Hz may be selected to suit the application.The ADXL213 is available in a 5mm x 5mm x 2mm, 8-pad hermetic LCC package.ApplicationsAutomotive tilt alarmData projectorsNavigationPlatform stabilization/levelingAlarms and motion detectorsHigh accuracy, 2-axis tilt sensing

The Analog Devices, Inc., amplifier mezzanine card (AMC) analog-to-digital converter (ADC) driver evaluates the performance of amplifiers in 8-lead, single and dual SOIC, 6-lead single SOT23, 8-lead dual MSOP, and 16-lead LFCSP packages. This add on board can be inserted on ADC evaluation boards using its 7-pin header. Figure 1 shows the AMC mounted on an Analog Devices, Inc., ADC evaluation board. The AMC can support any of Analog Devices operational amplifiers and ADC drivers in different packages. The user can configure the ADC driver as a Sallen-Key low-pass, high-pass, or band-pass filter, as a multiple feedback low-pass, high-pass, or band-pass filter, or as an inverting and noninverting operational amplifier. The user can also configure the AMC to drive a single-ended, fully differential, or a single-ended signal to a differential ADC. Optimized power and ground planes ensure low noise and high speed operation. Component placement and power supply bypassing are optimized for maximum circuit flexibility and performance. The AMC evaluation board accepts 0402 or 0603 surface mount technology (SMT) components, 1206 bypass capacitors, and 2.54 mm headers. All components are placed on the primary side. No components are placed on the secondary side.

The LTC2499 is a 16-channel (eight differential), 24-bit, No Latency ??? ADC with Easy Drive technology and a 2-wire, I2C interface. The patented sampling scheme eliminates dynamic input current errors and the shortcomings of on-chip buffering through automatic cancellation of differential input current. This allows large external source impedances and rail-to-rail input signals to be directly digitized while maintaining exceptional DC accuracy. The LTC2499 includes a high accuracy, temperature sensor and an integrated oscillator. This device can be configured to measure an external signal (from combinations of 16 analog input channels operating in single-ended or differential modes) or its internal temperature sensor. The integrated temperature sensor offers 1/30th?C resolution and 2?C absolute accuracy. The LTC2499 allows a wide common mode input range (0V to VCC), independent of the reference voltage. Any combination of single-ended or differential inputs can be selected and the first conversion, after a new channel is selected, is valid. Access to the multiplexer output enables optional external amplifiers to be shared between all analog inputs and auto calibration continuously removes their associated offset and drift.Applications Direct Sensor Digitizer Direct Temperature Measurement Instrumentation Industrial Process Control

DC1012A-B: Demo Board for the LTC2497 16-Bit 8-/16-Channel ΔΣ ADC with Easy Drive Input Current Cancellation and I2C Interface

The LTC2952 is a power management device that features three main functions: pushbutton on/off control of system power, ideal diode PowerPath? controllers and system monitoring. The LTC2952?s pushbutton input, which provides on/off control of system power, has independently adjustable ON and OFF debounce times. A simple microprocessor interface involving an interrupt signal allows for proper system housekeeping prior to power-down. The ideal diode PowerPath controllers provide automatic low loss switchover between two DC sources by regulating two external P-channel MOSFETs to have a small 20mV forward drop. High reliability systems may utilize the LTC2952?s monitoring features to ensure system integrity. These features include: power-fail, voltage monitoring and ?P watchdog. The LTC2952 operates over a wide operating voltage range to accommodate a large variety of input power supplies. The part?s combination of low 20mV external MOSFET regulation and very low standby current matches battery powered and power conscious application requirements.Applications Desktop and Notebook Computers Portable Instrumentations Cell Phones, PDA and Handheld Computers Servers and Computer Peripherals Battery Backup Systems