The ADF4401A is a fully integrated, system in package (SiP) translation loop (also known as an offset loop) module that includes a voltage controlled oscillator (VCO) and calibration phase-locked loop (PLL) circuit. Designed for highly jitter sensitive applications, this solution reduces board space and complexity compared to traditional discrete translation loop solutions designed on a printed circuit board (PCB). The time to market is significantly reduced by taking advantage of this highly integrated solution with in package circuitry and enhanced isolation that attenuates spurious components. The ADF4401A provides a frequency synthesis solution for engineers designing highly competitive systems. The ADF4401A requires an external phase detector or phase frequency detector (PFD) and an external local oscillator (LO) to form a frequency synthesis solution. The ADF4401A implements an integrated downconversion mixing stage in the feedback loop that sets the loop gain to 1 and minimizes the in band phase noise. By combining the frequency downconversion stage and low noise, integrated, wideband, VCO technology from Analog Devices, Inc., the ADF4401A offers a wideband jitter performance of 9 fs rms at 8 GHz output. The output jitter performance is largely dependent on the performance of the external offset LO. The ADF4401A module uses an internal PFD and VCO calibration circuitry to select the appropriate VCO band. The user can disable the calibration circuitry and close the loop using the external PFD. All on-chip registers are controlled via a serial port interface (SPI). APPLICATIONSInstrumentation and measurement Automated test equipment Aerospace and defense

The ADF5901 is a 24 GHz Tx monolithic microwave integrated circuit (MMIC) with an on-chip, 24 GHz VCO with PGA and dual Tx channels for radar systems. The on-chip, 24 GHz VCO generates the 24 GHz signal for the two Tx channels and the LO output. Each Tx channel contains a power control circuit. There is also an on-chip temperature sensor.Control of all the on-chip registers is through a simple 4-wire interface.The ADF5901 comes in a compact 32-lead, 5 mm ? 5 mm LFCSP package.Applications Automotive radars Industrial radars Microwave radar sensors Industrial sensors Precision instrumentation Tank level sensors Smart sensors Door opening Energy saving Commercial sensors: object detection and tracking Cars, boats, aircraft, and UAVs (drones): collision avoidance Intelligent transportation systems: intelligent traffic monitoring and control Surveillance and security

The ADGS1414D contains eight independent SPST switches. A serial peripheral interface (SPI) controls the switches. The SPI has robust error detection features, such as cyclic redundancy check (CRC) error detection, invalid read and write address detection, and SCLK count error detection. It is possible to daisy-chain multiple ADGS1414D devices together. Daisy-chain mode enables the configuration of multiple devices with a minimal amount of digital lines. The route of digital signals and supplies through the ADGS1414D allows for a further increase in channel density. Integrated passive components eliminate the need for external passive components. FUNCTIONAL BLOCK DIAGRAM Figure 1. The ADGS1414D is suited to high density switching applications, such as large switching matrices and fanout applications. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. Multifunction pin names may be referenced by their relevant function only.Applications? Automated test equipment Data acquisition systems Sample-and-hold systems Audio and video signal routing Communications systems Relay replacement

The ADuCM320 is a fully integrated single package device that incorporates high performance analog peripherals together with digital peripherals controlled by an 80 MHz ARM Cortex-M3 processor and integral flash for code and data.The ADC on the ADuCM320 provides 14-bit, 1 MSPS data acquisition on up to 16 input pins that can be programmed for single-ended or differential operation. The voltage at the IDAC output pins can also be measured by the ADC, which is useful for controlling the power consumption of the current DACs. Additionally, chip temperature and supply voltages can be measured.The ADC input voltage is 0 V to VREF. A sequencer is provided, which allows a user to select a set of ADC channels to be measured in sequence without software involvement during the sequence. The sequence can optionally repeat automatically at a user selectable rate.Up to eight VDACs are provided with output ranges that are programmable to one of two voltage ranges.Four IDAC sources are provided. The output currents are programmable with ranges of 0 mA to 150 mA. A low drift band gap reference and voltage comparator completes the analog input peripheral set.The ADuCM320 can be configured so that the digital and analog outputs will retain their output voltages and currents through a watchdog or software reset sequence. Thus, a product can remain functional even while the ADuCM320 is resetting itself.The ADuCM320 has a low power ARM Cortex-M3 processor and a 32-bit RISC machine that offers up to 100 MIPS peak performance. Also integrated on chip are 2 ? 128 kB Flash/EE memory and 32 kB of SRAM. The flash comprises two separate 128 kB blocks supporting execution from one flash block and simultaneous writing/erasing of the other flash block.The ADuCM320 operates from an on-chip oscillator or a 16 MHz external crystal and a PLL at 80 MHz. This clock can optionally be divided down to reduce current consumption. Additional low power modes can be set via software. In normal operating mode, the ADuCM320 digital core consumes about 300 ?A per MHz.The device includes an MDIO interface capable of operating at up to 4 MHz. The capability to simultaneously execute from one flash block and write/erase the other flash block makes the ADuCM320 ideal for 10G, 40G, and 100G optical applications. User programming is eased by incorporating PHYADR and DEVADD hardware comparators. In addition, the nonerasable kernel code plus flags in user flash provide assistance by allowing user code to robustly switch between the two blocks of user flash code and data spaces.The ADuCM320 integrates a range of on-chip peripherals that can be configured under software control, as required in the appli-cation. These peripherals include 1 ? UART, 2 ? I2C, and 2 ? SPI serial input/output communication controllers, GPIO, 32-element programmable logic array, 3 general-purpose timers, plus a wake-up timer and system watchdog timer. A 16-bit PWM with seven output channels is also provided.GPIO pins on the device power up in high impedance input mode. In output mode, the software chooses between open-drain mode and push-pull mode. The pull-up resistors can be disabled and enabled in software. In GPIO output mode, the inputs can remain enabled to monitor the pins. The GPIO pins can also be programmed to handle digital or analog peripheral signals, in which case the pin characteristics are matched to the specific requirement.A large support ecosystem is available for the ARM Cortex-M3 processor to ease product development of the ADuCM320. Access is via the ARM serial wire debug port (SW-DP). On-chip factory firmware supports in-circuit serial download via MDIO. These features are incorporated into a low cost QuickStart development system supporting this precision analog microcontroller family. APPLICATIONS Optical networking

The ADuCRF101 is a fully integrated, data acquisition solution that is designed for low power, wireless applications. It features a 12-bit analog-to-digital converter (ADC), a low power ARM Cortex?-M3 processor, a 862 MHz to 928 MHz and 431 MHz to 464 MHz RF transceiver, and Flash?/EE memory. The ADuCRF101 is packaged in a 9 mm ? 9 mm LFCSP.The data acquisition section consists of a 12-bit SAR ADC. The six inputs can be configured in single-ended or differential mode. When configured in single-ended mode, they can be used for ratiometric measurements on sensors that are powered, when required, from the internal low dropout regulator (LDO). An internal battery monitor channel and an on-chip temperature sensor are also available.This wireless data acquisition system is designed to operate in battery-powered applications where low power is critical. The device can be configured in normal operating mode or different low power modes under direct program control. In flexi mode, any peripheral can wake up the device and operate it. In hibernate mode, the internal wake-up timer remains active. In shutdown mode, only an external interrupt can wake up the device.The ADuCRF101 integrates a low power ARM Cortex-M3 processor. It is a 32-bit RISC machine, offering up to 1.25 DMIPS peak performance. The ARM Cortex-M3 processor also has a flexible 14-channel direct memory access (DMA) controller that supports communication peripherals, serial peripheral interface (SPI), UART, and I2C. Also provided on chip are 128 kB of nonvolatile Flash/EE memory and 16 kB of SRAM.A 16 MHz on-chip oscillator generates the system clock. This clock can be internally divided for the processor to operate at a lower frequency, thus saving power. A low power, internal 32 kHz oscillator is available and can be used to clock the four timers, as follows: two general-purpose timers, a wake-up timer, and a system watchdog timer.A range of communication peripherals can be configured, as required, in a specific application. These peripherals include UART, I2C, SPI, GPIO ports, PWM, and RF transceivers.The RF transceiver communicates in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands using multiple configurations.On-chip factory firmware supports in-circuit serial download via the UART, and nonintrusive emulation and program download are also supported via the serial wire interface. These features are incorporated into a low cost development system supporting this precision analog microcontroller family.The ADuCRF101 operates from 2.2 V to 3.6 V and is specified over an industrial temperature range of ?40?C to +85?C. It is available in a 64-lead LFCSP packageApplications Battery powered wireless sensor Medical telemetry systems Industrial and home automation Asset tracking Security systems (access systems) Health and fitness applications??

The ADuCRF101 is a fully integrated, data acquisition solution that is designed for low power, wireless applications. It features a 12-bit analog-to-digital converter (ADC), a low power ARM Cortex?-M3 processor, a 862 MHz to 928 MHz and 431 MHz to 464 MHz RF transceiver, and Flash?/EE memory. The ADuCRF101 is packaged in a 9 mm ? 9 mm LFCSP.The data acquisition section consists of a 12-bit SAR ADC. The six inputs can be configured in single-ended or differential mode. When configured in single-ended mode, they can be used for ratiometric measurements on sensors that are powered, when required, from the internal low dropout regulator (LDO). An internal battery monitor channel and an on-chip temperature sensor are also available.This wireless data acquisition system is designed to operate in battery-powered applications where low power is critical. The device can be configured in normal operating mode or different low power modes under direct program control. In flexi mode, any peripheral can wake up the device and operate it. In hibernate mode, the internal wake-up timer remains active. In shutdown mode, only an external interrupt can wake up the device.The ADuCRF101 integrates a low power ARM Cortex-M3 processor. It is a 32-bit RISC machine, offering up to 1.25 DMIPS peak performance. The ARM Cortex-M3 processor also has a flexible 14-channel direct memory access (DMA) controller that supports communication peripherals, serial peripheral interface (SPI), UART, and I2C. Also provided on chip are 128 kB of nonvolatile Flash/EE memory and 16 kB of SRAM.A 16 MHz on-chip oscillator generates the system clock. This clock can be internally divided for the processor to operate at a lower frequency, thus saving power. A low power, internal 32 kHz oscillator is available and can be used to clock the four timers, as follows: two general-purpose timers, a wake-up timer, and a system watchdog timer.A range of communication peripherals can be configured, as required, in a specific application. These peripherals include UART, I2C, SPI, GPIO ports, PWM, and RF transceivers.The RF transceiver communicates in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands using multiple configurations.On-chip factory firmware supports in-circuit serial download via the UART, and nonintrusive emulation and program download are also supported via the serial wire interface. These features are incorporated into a low cost development system supporting this precision analog microcontroller family.The ADuCRF101 operates from 2.2 V to 3.6 V and is specified over an industrial temperature range of ?40?C to +85?C. It is available in a 64-lead LFCSP packageApplications Battery powered wireless sensor Medical telemetry systems Industrial and home automation Asset tracking Security systems (access systems) Health and fitness applications??

The ADG1421 / ADG1422?/ ADG1423?contain two independent single-pole/single-throw (SPST) switches. The ADG1421 and ADG1422 differ only in that the digital control logic is inverted. The ADG1421 switches are turned on with Logic 1 on the appropriate control input, and Logic 0 is required for the ADG1422. The ADG1423 has one switch with digital control logic similar to that of the ADG1421; the logic is inverted on the other switch. The ADG1423 exhibits break-before-make switching action for use in multiplexer applications. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.The iCMOS? (industrial CMOS) modular manufacturing process combines high voltage, complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has achieved. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size.The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. The iCMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments.PRODUCT HIGHLIGHTS 2.4 ? maximum on resistance at 25?C. Minimum distortion. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. 10-lead MSOP and 10-lead, 3 mm ? 3 mm LFCSP packages.APPLICATIONS Automatic test equipment Data acquisition systems Relay replacements Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

The AD1938 is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with input and eight digital-to-analog converters (DACs) with single-ended output using the Analog Devices, Inc., patented multibit sigma-delta (?-?) architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters.The AD1938 operates from 3.3 V digital and analog supplies. The AD1938 is available in a 48-lead (single-ended output) LQFP package. Other members of this family include a differential DAC output and I2C? control port version.The AD1938 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR clock or from an external crystal, the AD1938 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The DACs and ADCs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 3.3 V supplies, power consumption is minimized, further reducing emissions.APPLICATIONS Automotive audio systems Home Theater Systems Set-top boxes Digital audio effects processors

The AD4003/AD4007/AD4011 are high accuracy, high speed, low power, 18-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4003/AD4007/AD4011 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD4030-24 is a 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC) with Easy Drive?. With a guaranteed maximum ?0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24 achieves unparalleled precision from ?40?C to +125?C. Figure 1 in the data sheet shows the functional architecture of the AD4030-24.A low-drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4030-24 offers a typical dynamic range of 109 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio can increase dynamic range up to 155.5 dB. The wide differential input and common mode ranges allow inputs to use the full ?VREF range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4030-24. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. A wide data clocking window, multiple SDO lanes, and optional DDR data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode and ADC host clock mode relax the timing requirements and simplify the use of digital isolators.The BGA package of the AD4030-24 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout.APPLICATIONS Automatic test equipment Digital control loops Medical instrumentation Seismology Semiconductor manufacturing Scientific instrumentation