Micropower 3-Sensor Combination Including Acceleration and Temperature Features: All sensors sampled synchronously Up to 400 Hz ODR Samples can be synchronized to external trigger Ultralow power 1.95 A at 100 Hz ODR, 2.0 V supply, all sensors on 270 nA at 6 Hz motion activated wake-up mode 10 nA standby current 12-bit resolution for all sensors Acceleration scale factor down to 1 mg/LSB Temperature scale factor: 0.065C/LSB (typical) Built-in features for motion-based system level power savings Adjustable threshold sleep/wake modes for motion activation Accelerometer, temperature sensor, and provision for third analog sensor input Autonomous interrupt processing, without need for microcontroller intervention, to allow the rest of the system to be turned off completely Deep embedded FIFO minimizes host processor load Awake state output enables implementation of standalone, motion activated switch Wide supply and I/O voltage ranges: 1.6 V to 3.5 VOperates off 1.8 V to 3.3 V railsPower can be derived from coin cell batterySPI digital interfaceSmall and thin 3 mm 3.25 mm 1.06 mm package

Micropower, 3-Axis, 200 g Digital Output, MEMS Accelerometer Features: ±200 g measurement range 160 Hz to 2560 Hz user selectable bandwidth with four-pole antialiasing filter Selectable oversampling ratio Adjustable high-pass filter Ultra low power Power can be derived from a coin cell battery 28 µA at 2560 Hz ODR, 3.3 V supply Low power, wake-up mode for low g activity detection 1.7 A instant on mode with adjustable threshold Built in features for system level power savings Autonomous interrupt processing without processor intervention Ultra low power event monitoring detects impacts and wakes up fast enough to capture the transient events Adjustable, low g threshold activity and inactivity detection Wide operating voltage range: 2.5 V to 3.5 V Acceleration sample synchronization via external trigger SPI digital interface and I2C interface format support 12-bit output at 100 mg/LSB scale factor Wide temperature range: 40°C to +105°C Small, thin, 3 mm × 3.25 mm × 1.06 mm package

Up to 1GHz SHARC+ DSP with 640KB L1, 1024KB Shared L2 SRAM, 400-Ball CSP_BGA Features:SHARC+ Core infrastructure 800MHz (max) or 1GHz (max) Core clock frequency 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedMemory 1024KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases One Level 3 (L3) interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.35 V capable DDR3L devices) SDRAM devices16-bit DDR/DDR3L Memory Controller 1.35V support for DDR3LAdvanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 4x Precision Clock Generators 28 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin 6x I2C,3x UARTs 2x Link Ports 10x General Purpose Timer, 1x General Purpose Counter 2x Watchdog Timers 4-ch 12bit Housekeeping ADCs 40 GPIO pins, 28 DAI pins Thermal SensorPackage 17mm x 17mm (0.8mm pitch) 400-ball CSP_BGAAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications

5.5 GHz to 18 GHz, GaAs, pHEMT, MMIC, Medium Power Amplifier Features: High saturated output power: 26 dBm with 24% PAE  High gain: 24 dB typical High output IP3: 36 dBm typical High output P1dB: 25.5 dBm Die size: 2.19 mm × 1.05 × 0.1 mm

Multichemistry Buck Battery Charger Controller with Digital Telemetry System Features: Multichemistry Li-Ion/Polymer, LiFePO4, or Lead-Acid Battery Charger with Termination High Efficiency Synchronous Buck Battery Charger Digital Telemetry System Monitors VBAT, IBAT, RBAT, NTC Ratio (Battery Temperature), VIN, IIN, VSYSTEM, Die Temperature Coulomb Counter and Integrated 14-Bit ADC Wide Charging Input Voltage Range: 4.5V to 35V Wide Battery Voltage Range: Up to 35V Input Undervoltage Charge Current Limit Loop Maximum Power Point Tracking Optional I2C Serial Port Control Input Current Limit Prioritizes System Load Output Input and Output Ideal Diodes Provide Low Loss PowerPath™ Operation Instant-On Operation with Discharged Battery

SmartMesh IP Wireless 802.15.4e System-on-Chip Features: 72-pin 10mm × 10mm QFN package 2.4 GHz, IEEE 802.15.4e System-on-Chip, Complete with Embedded SmartMesh Networking Software >99.999% Network Reliability in the Most Challenging RF Environments Sub 50µA Routing Nodes Serves as either a Wireless Mote, EManager, or Access Point Mote in a SmartMesh IP network These products contain encryption. Import/export restrictions may apply.

Low Noise, Low Distortion Fully Differential Input/Output Amplifier/Driver Features: Fully Differential Input and Output Wide Supply Range: 2.375V to 12.6V Rail-to-Rail Output Swing Low Noise: 3nV/√Hz Low Distortion, 2VP-P, 1MHz: –94dBc Adjustable Output Common Mode Voltage Unity Gain Stable Gain-Bandwidth: 70MHz Slew Rate: 65V/μs Large Output Current: 85mA DC Voltage Offset <2mV MAX Open-Loop Gain: 100V/mV Low Power Shutdown 8-Pin MSOP or 3mm × 3mm DFN Package

GaAs MMIC SP4T Non-Reflective Switch, DC - 3.5 GHz Features: RoHS Compliant Product Low Insertion Loss (2 GHz): 0.7 dB Single Positive Supply: VDD = +5V Integrated 2:4 TTL Decoder 16 Lead QSOP Package

Up to 1GHz SHARC+ DSP with 640KB L1, 1024KB Shared L2 SRAM, 400-Ball CSP_BGA Features:SHARC+ Core infrastructure 800MHz (max) or 1GHz (max) Core clock frequency 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedMemory 1024KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases One Level 3 (L3) interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.35 V capable DDR3L devices) SDRAM devices16-bit DDR/DDR3L Memory Controller 1.35V support for DDR3LAdvanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 4x Precision Clock Generators 28 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin 6x I2C,3x UARTs 2x Link Ports 10x General Purpose Timer, 1x General Purpose Counter 2x Watchdog Timers 4-ch 12bit Housekeeping ADCs 40 GPIO pins, 28 DAI pins Thermal SensorPackage 17mm x 17mm (0.8mm pitch) 400-ball CSP_BGAAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications

Microwave Wideband Synthesizer with Integrated VCO Features: Output frequency range: 800 MHz to 12.8 GHz Jitter = 18 fsRMS (Integration BW: 100 Hz to 100 MHz) Jitter = 27 fsRMS (ADC SNR Method) Wideband Noise Floor: -160 dBc/Hz @12 GHz PLL Specifications: -239 dBc/Hz: Normalized In-Band Phase Noise Floor -147 dBc/Hz: Normalized In-Band 1/f Noise Phase Detector Frequency up to 500 MHzReference Input Frequency up to 1 GHz Typical -100 dBc PFD spursReference to Output Delay Specifications: Part-to-Part Standard Deviation: 3 ps Temperature Drift: 0.03 ps/ Adjustment Step Size: <+/-0.1 ps Multi-chip Output Phase Alignment 3.3 V and 5 V Power supplies 7 mm x 7 mm 48 Lead LGA