The AD8582 is a complete, parallel input, dual 12-bit, voltage output DAC designed to operate from a single +5 volt supply. Built using a CBCMOS process, this monolithic DAC offers the user low cost, and ease-of-use in +5 volt only systems.Included on the chip, in addition to the DACs, are a rail-to-rail amplifier, latch and reference. The reference (VREF) is trimmed to 2.5 volts output, and the on-chip amplifier gains up the DAC output to 4.095 volts full scale. The user needs only supply a +5 volt supply.>/p>The AD8582 is coded natural binary. The op amp output swings from 0 volt to +4.095 volts for a one-millivolt-per-bit resolution, and is capable of driving ±5 mA. Operation down to 4.3 V is possible with output load currents less than 1 mA.The high speed parallel data interface connects to the fastest processors without wait states. The double-buffered input structure allows the user to load the input registers one at a time, then a single load strobe tied to both LDA + LDB inputs will update both DAC outputs simultaneously. LDA and LDB can also be activated independently to immediately update their respective DAC registers. An address input decodes DAC A or DAC B when the chip select CS input is strobed. An asynchronous reset input sets the output to zero scale. The MSB bit can be used to establish a preset to midscale when the reset input is strobed.The AD8582 is available in the 24-pin plastic DIP and the surface mount SOIC-24. Each part is fully specified for operation over -40°C to +85°C, and the full +5 V ±5% power supply range.

The 12-channel AD8802 / AD8804 provides independent digitally-controllable voltage outputs in a compact 20-lead package. This potentiometer divider TrimDAC® allows replacement of the mechanical trimmer function in new designs. The AD8802 / AD8804 is ideal for dc voltage adjustment applications.Easily programmed by serial interfaced microcontroller ports, the AD8802 with its midscale preset is ideal for potentiometer replacement where adjustments start at a nominal value. Applications such as gain control of video amplifiers, voltage controlled frequencies and bandwidths in video equipment, geometric correction and automatic adjustment in CRT computer graphic displays are a few of the many applications ideally suited for these parts. The AD8804 provides independent control of both the top and bottom end of the potentiometer divider allowing a separate zero-scale voltage setting determined by the VREFL pin. This is helpful for maximizing the resolution of devices with a limited allowable voltage control range.Internally the AD8802/AD8804 contains 12 voltage-output digital-to-analog converters, sharing a common reference-voltage input.Each DAC has its own DAC latch that holds its output state. These DAC latches are updated from an internal serial-to-parallel shift register that is loaded from a standard 3-wire serial input digital interface. The serial-data-input word is decoded where the first 4 bits determine the address of the DAC latches to be loaded with the last 8 bits of data. The AD8802/ AD8804 consumes only 10 µA from 5 V power supplies. In addition, in shutdown mode reference input current consumption is also reduced to 10 µA while saving the DAC latch settings for use after return to normal operation.The AD8802 / AD8804 is available in the 20-pin plastic DIP, the SOIC-20 surface mount package, and the 1 mm thin TSSOP-20 package.APPLICATIONS Automatic Adjustment Trimmer Replacement Video and Audio Equipment Gain and Offset Adjustment Portable and Battery Operated Equipment

The ADP3303 is a member of the ADP3300, ADP3301, andADP3309 family of precision low dropout anyCAP voltage regulators. The ADP3303 stands out from the conventional LDOs with a different architecture, an enhanced process, and adifferent package. Its patented design requires only a 0.47 μFoutput capacitor for stability. This device is insensitive to capacitor Equivalent Series Resistance (ESR) and is stable with any good quality capacitor, including ceramic types (MLCC) forspace restricted applications. The ADP3303 achievesexceptional accuracy of ±0.8% at room temperature and ±1.4%overall accuracy over temperature, line, and load regulations.The dropout voltage of the ADP3303 is only 180 mV (typical) at 200 mA.In addition to the architecture and process, the Analog Devices, Inc., proprietary thermally enhanced package (Thermal Coastline)can handle 1 W of power dissipation without external heatsink or large copper surface on the printed circuit board (PCB).This keeps PCB real estate to a minimum and makes theADP3303 very attractive for use in portable equipment.The ADP3303 operates with a wide input voltage range from 3.2 V to 12 V and delivers a load current in excess of 200 mA.It features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overloadprotection is activated. Other features include shutdown and optional noise reduction capabilities. The ADP3300, ADP3301,and ADP3309 anyCAP LDO family offers a wide range of output voltages and output current levels:ADP3300 (50 mA, SOT-23)ADP3301 (100 mA) ADP3302 (100 mA, Dual Output)Applications Cellular telephones Notebook, palmtop computers Battery powered systems Portable instruments Post regulator for switching supplies Bar code scanners

The ADP3303 is a member of the ADP3300, ADP3301, andADP3309 family of precision low dropout anyCAP voltage regulators. The ADP3303 stands out from the conventional LDOs with a different architecture, an enhanced process, and adifferent package. Its patented design requires only a 0.47 μFoutput capacitor for stability. This device is insensitive to capacitor Equivalent Series Resistance (ESR) and is stable with any good quality capacitor, including ceramic types (MLCC) forspace restricted applications. The ADP3303 achievesexceptional accuracy of ±0.8% at room temperature and ±1.4%overall accuracy over temperature, line, and load regulations.The dropout voltage of the ADP3303 is only 180 mV (typical) at 200 mA.In addition to the architecture and process, the Analog Devices, Inc., proprietary thermally enhanced package (Thermal Coastline)can handle 1 W of power dissipation without external heatsink or large copper surface on the printed circuit board (PCB).This keeps PCB real estate to a minimum and makes theADP3303 very attractive for use in portable equipment.The ADP3303 operates with a wide input voltage range from 3.2 V to 12 V and delivers a load current in excess of 200 mA.It features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overloadprotection is activated. Other features include shutdown and optional noise reduction capabilities. The ADP3300, ADP3301,and ADP3309 anyCAP LDO family offers a wide range of output voltages and output current levels:ADP3300 (50 mA, SOT-23)ADP3301 (100 mA) ADP3302 (100 mA, Dual Output)Applications Cellular telephones Notebook, palmtop computers Battery powered systems Portable instruments Post regulator for switching supplies Bar code scanners

The ADP3335 is a member of the ADP330x family ofprecision low dropout any CAP voltage regulators. TheADP3335 operates with an input voltage range of +2.6 Vto +12 V and delivers a continuous load current up to 500mA. The ADP3335 stands out from the conventionalLDOs with the lowest thermal resistance of any MSOP-8package and an enhanced process that enables it to offerperformance advantages beyond its competition. Its patenteddesign requires only a 1.0 µF output capacitor forstability. This device is insensitive to output capacitorEquivalent Series Resistance (ESR), and is stable with anygood quality capacitor, including ceramic (MLCC) typesfor space-restricted applications. The ADP3335 achieves exceptional accuracy of ±0.9% at room temperature and ±1.8% over temperature, line and load variations. The dropout voltage of the ADP3335 is only 200 mV (typical) at 500 mA.This device also includes a safety currentlimit, thermal overload protection and a shutdown feature.In shutdown mode, the ground current is reduced to lessthan 2 µA. The ADP3335 has ultralow quiescent current60 µA (typ) in light load situations.

The DAC-8800 Trim DAC™ is designed to be a general purpose digitally controlled voltage adjustment device. The output voltage range can be independently set for each set of four D/A converters. In addition, both unipolar and bipolar output voltage ranges are easy to establish by external reference input high and low terminals. The digitally-programed output voltages are ideal for op amp trimming, voltage-controlled amplifier gain setting and any general purpose trimming tasks.A three-wire serial digital interface loads the contents of eight internal DAC registers which establish the output voltage levels. An asynchronous Clear (CLR) input places all DACs in a zero code output condition, very handy for system power-up. An internal regulator provides TTl input compatibility over a wide range of VDD supply voltages. Single supply operation is available by connecting VSS to GND.

Development Boards & Kits - ARM Arduino based Wireless Development Board

The AD6684 is a 135 MHz bandwidth, quad intermediate frequency (IF) receiver. It consists of four 14-bit, 500 MSPS ADCs and various digital processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed to support communications applications. The analog full power bandwidth of the device is 1.4 GHz. The quad ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The AD6684 is optimized for wide input bandwidth, excellent linearity, and low power in a small package. The analog inputs and clock signal input are differential. Each pair of ADC data outputs are internally connected to two DDCs through a crossbar mux. Each DDC consists of up to five cascaded signal processing stages: a 48-bit frequency translator, NCO, and up to four half-band decimation filters. Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6684 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining a 9-bit output resolution. Each ADC output is also connected internally to a VDR block. This optional mode allows full dynamic range for defined input signals. Inputs that are within a defined mask (based on DPD applications) are passed unaltered. Inputs that violate this defined mask result in the reduction of the output resolution. With VDR, the dynamic range of the observation receiver is determined by a defined input frequency mask. For signals falling within the mask, the outputs are presented at the maximum resolution allowed. For signals exceeding defined power levels within this frequency mask, the output resolution is truncated. This mask is based on DPD applications andsupports tunable real IF sampling, and zero IF or complex IF receive architectures. Operation of the AD6684 in the DDC, NSR, and VDR modes is selectable via SPI-programmable profiles (the default mode is NSR at startup).In addition to the DDC blocks, the AD6684 has several functions that simplify the AGC function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. Users can configure each pair of IF receiver outputs onto either one or two lanes of Subclass 1 JESD204B-based high speed serialized outputs, depending on the decimation ratio and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF±, SYNCINB±AB, and SYNCINB±CD input pins. The AD6684 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using the 1.8 V capable, 3-wire SPI. The AD6684 is available in a Pb-free, 72-lead LFCSP and is specified over the −40°C to +105°C junction temperature range. Product Highlights Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.Applications Communications Diversity multiband, multimode digital receivers 3G/4G, W-CDMA, GSM, LTE, LTE-A HFC digital reverse path receivers Digital predistortion observation paths General-purpose software radios

The AD7124-8 is a low power, low noise, completely integratedanalog front end for high precision measurement applications.The device contains a low noise, 24-bit Σ-Δ analog-to-digitalconverter (ADC), and can be configured to have 8 differentialinputs or 15 single-ended or pseudo differential inputs. The onchiplow gain stage ensures that signals of small amplitude canbe interfaced directly to the ADC.One of the major advantages of the AD7124-8 is that it gives theuser the flexibility to employ one of three integrated powermodes. The current consumption, range of output data rates,and rms noise can be tailored with the power mode selected.The device also offers a multitude of filter options, ensuring thatthe user has the highest degree of flexibility.The AD7124-8 can achieve simultaneous 50 Hz and 60 Hzrejection when operating at an output data rate of 25 SPS (singlecycle settling), with rejection in excess of 80 dB achieved at loweroutput data rates.The AD7124-8 establishes the highest degree of signal chainintegration. The device contains a precision, low noise, lowdrift internal band gap reference and accepts an externaldifferential reference, which can be internally buffered. Otherkey integrated features include programmable low drift excitationcurrent sources, burnout currents, and a bias voltage generator,which sets the common-mode voltage of a channel to AVDD/2.The low-side power switch enables the user to power downbridge sensors between conversions, ensuring the absoluteminimal power consumption of the system. The device alsoallows the user the option of operating with either an internalclock or an external clock.The integrated channel sequencer allows several channels to beenabled simultaneously, and the AD7124-8 sequentially convertson each enabled channel, simplifying communication with thedevice. As many as 16 channels can be enabled at any time, achannel being defined as an analog input or a diagnostic suchas a power supply check or a reference check. This uniquefeature allows diagnostics to be interleaved with conversions.The AD7124-8 also supports per channel configuration. Thedevice allows eight configurations or setups. Each configurationconsists of gain, filter type, output data rate, buffering, andreference source. The user can assign any of these setups on achannel by channel basis.The AD7124-8 also has extensive diagnostic functionalityintegrated as part of its comprehensive feature set. Thesediagnostics include a cyclic redundancy check (CRC), signalchain checks, and serial interface checks, which lead to a morerobust solution. These diagnostics reduce the need for externalcomponents to implement diagnostics, resulting in reducedboard space needs, reduced design cycle times, and cost savings.The failure modes effects and diagnostic analysis (FMEDA) of atypical application has shown a safe failure fraction (SFF) greaterthan 90% according to IEC 61508.The device operates with a single analog power supply from 2.7 Vto 3.6 V or a dual 1.8 V power supply. The digital supply has arange of 1.65 V to 3.6 V. It is specified for a temperature rangeof −40°C to +125°C. The AD7124-8 is housed in a 32-leadLFCSP package.Note that, throughout this data sheet, multifunction pins, suchas DOUT/RDY, are referred to either by the entire pin name orby a single function of the pin, for example, RDY, when onlythat function is relevant.Applications Temperature measurement Pressure measurement Industrial process control Instrumentation Smart transmitters

The AD7402 is a high performance, second-order, Σ-Δ modulator that converts an analog input signal into a high speed, single-bit data stream, with on-chip digital isolation based on Analog Devices, Inc., iCoupler® technology. The AD7402 operates from a 4.5 to 5.5 V (VDD1) power supply and accepts a differential input signal of ±250 mV (±320 mV full scale). The differential input is ideally suited to shunt voltage monitoring in high voltage applications where galvanic isolation is required.The analog input is continuously sampled by a high performance analog modulator, and converted to a ones density, digital output stream with a data rate of 10 MHz. The original information can be reconstructed with an appropriate digital filter to achieve 87 dB signal to noise ratio (SNR) at 39 kSPS. The serial input/output can use a 3 V to 5.5 V or a 3.3 V supply (VDD2).The serial interface is digitally isolated. High speed complementary metal oxide semiconductor (CMOS) technology, combined with monolithic transformer technology, means the on-chip isolation provides outstanding performance characteristics, superior to alternatives such as optocoupler devices. The AD7402 device is offered in an 8-lead wide body SOIC package and has an operating temperature range of −40°C to +105°C.Safety and regulatory approvals UL recognition 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A VDE Certificate of Conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 1250 VPEAKApplications Shunt current monitoring AC motor controls Power and solar inverters Wind turbine inverters Data acquisition systems Analog-to-digital and opto-isolator replacements