Dual Low Power, 10-Bit TxDAC Digital-to-Analog Converters Features:Power dissipation @ 3.3 V, 20 mA output 191 mW @ 10 MSPS 232 mW @ 125 MSPSSleep mode: Supply voltage: 1.8 V to 3.3 VSFDR to Nyquist 86 dBc @ 1 MHz output 85 dBc @ 10 MHz outputNSD @ 10 MHz output, 125 MSPS, 20 mA: 143 dBc/HzDifferential current outputs: 4 mA to 20 mA2 on-chip auxiliary DACsCMOS inputs with single-port operationOutput common mode: adjustable 0 V to 1.2 VSmall footprint 40-lead LFCSP RoHS-compliant package

Digitally Programmable Sensor Signal Amplifier Features: Very low offset voltage: 12 μV maximum over temperature  Very low input offset voltage drift:  65 nV/°C maximum High CMRR: 96 dB minimum  Digitally programmable gain and output offset voltage  Gain range from 28 to 1300  Single-wire serial interface  Stable with any capacitive load  SOIC and LFCSP packages  2.7 V to 5.5 V operation  Qualified for automotive applications

Hot Swap Controller and I2C Power Monitor Features: Allows safe board insertion and removal from a live backplane  Controls supply voltages from 3.15 V to 16.5 V  Precision current sense amplifier  Precision voltage input  12-bit ADC for current and voltage readback  Charge pumped gate drive for external N-channel FET  I2C fast mode-compliant interface (400 kHz maximum) Adjustable analog current limit with circuit breaker  ±3% accurate hot swap current limit level  Fast response limits peak fault current  Automatic retry or latch-off on current fault  Programmable hot swap timing via TIMER pin  Active-high ON pin  2 address pins allow 16 devices on the same bus 10-lead MSOP

DSP Microcomputer

Dual 12-Bit, LVDS Interface 500 MSPS DAC Features: High dynamic range, dual DAC parts LVDS inputs with dual-port or optional interleaved single-port operation Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits usable outputs beyond Nyquist frequency LVDS inputs with dual-port or optional interleaved singleport operation See datasheet for additional features

800 MHz, Linear-in-dB VGA with AGC Detector Features: Analog variable gain range: −12 dB to +22 dB Linear-in-dB scaling: 37.5 dB/V 3 dB bandwidth: 800 MHz @ VGAIN = 0.5 V Integrated rms detector P1dB: 16 dBm @ 140 MHz Output IP3: 33 dBm @ 140 MHz Noise figure at maximum gain: 9.5 dB @ 140 MHz Input and output impedances: 50 Ω Single-supply voltage from 4.5 V to 5.5 V RoHS-compliant, 24-lead LFCSP

Complete, Dual, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DACs

Complete, Quad, 14-Bit, Serial Input, Unipolar/Bipolar Voltage Output DAC Features: Complete, quad, 12-/14-/16-bit digital-to-analog converter (DAC) Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum Operates from single/dual supplies Total unadjusted error (TUE): 0.1% FSR maximum Settling time: 10 μs maximum Integrated reference buffers See data sheet for additional features

Fully Accurate, Quad, 16-Bit, Buffered VOUT, 4.5 V to 5.5 V nanoDAC with SPI Interface Features: Low power quad 12-/14-/16-bit DAC, ±1 LSB INL Pin compatible and performance upgrade to AD5666 Individual and common voltage reference pin options Rail-to-rail operation 4.5 V to 5.5 V power supply Power-on reset to zero scale or midscale 3 power-down functions and per-channel power-down Hardware LDAC with software LDAC override function CLR function to programmable code SDO daisy-chaining option 14-/16-lead TSSOP Internal reference buffer and internal output amplifier 

2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-Bit nanoDAC in 10-lead LFCSP, 16-lead 3 mm x 3 mm LFCSP, and 16-lead TSSOP Features: 12-/16-bit resolution 1 LSB INL 11.8 nV/√Hz noise spectral density 1 μs settling time 1.1 nV-sec glitch energy 0.05 ppm/°C temperature drift 5 kV HBM ESD classification See data sheet for additional features Also available in16-lead TSSOP