Secondary-Side Synchronous Forward Controller Features: Secondary-Side Control for Fast Transient Response Self-Starting Architecture Eliminates Need for Separate Bias Regulator Proprietary Gate Drive Encoding Scheme Reduces System Complexity Current Mode Control Ensures Current Sharing PLL Fixed Frequency: 100kHz to 500kHz ±1% Output Voltage Accuracy OPTI-LOOP Compensation Available in a Narrow 16-Lead SSOP Package

Very Low Noise, Differential Amplifier and 5MHz Lowpass Filter Features: Programmable Differential Gain via Two External Resistors Adjustable Output Common Mode Voltage Operates and Specified with 3V, 5V, ±5V Supplies 0.5dB Ripple 4th Order Lowpass Filter with 5MHz Cutoff 82dB S/N with 3V Supply and 2VP-P Output Low Distortion, 2VP-P, 800Ω Load 1MHz: 93dBc 2nd, 96dBc 3rd Fully Differential Inputs and Outputs Compatible with Popular Differential Amplifier Pinouts Available in an SO-8 Package

Low IQ Synchronous Step-Down Controller Features: Wide Output Voltage Range: 0.8V ≤ VOUT ≤ 10V Low Operating IQ: 80µA OPTI-LOOP® Compensation Minimizes COUT ±1% Output Voltage Accuracy Wide VIN Range: 4V to 36V Operation Phase-Lockable Fixed Frequency 140kHz to 650kHz Dual N-Channel MOSFET Synchronous Drive Very Low Dropout Operation: 99% Duty Cycle Adjustable Output Voltage Soft-Start or Tracking Output Current Foldback Limiting Output Overvoltage Protection Low Shutdown IQ: 10µA Selectable Continuous, Pulse-Skipping or Burst Mode® Operation at Light Loads Small 16-Lead Narrow SSOP or 3mm × 5mm DFN Package

Single Switch Synchronous Forward Controller Features: Synchronous Rectifier Control for High Efficiency Programmable Volt-Second Clamp Output Power Levels from 25W to 500W Low Current Start-Up (LT1952: 460µA; VIN On/Off = 14.25V/8.75V) (LT1952-1: 400µA; VIN On/Off = 7.75V/6.5V) True PWM Soft-Start Low Stress Short Circuit Protection Precision 107mV Current Limit Threshold Adjustable Delay for Synchronous Timing Accurate Shutdown Threshold with Programmable Hysteresis Programmable Slope Compensation Programmable Leading Edge Blanking Programmable Frequency (100kHz to 500kHz) Synchronizable to an External Clock up to 1.5 • fOSC Internal 1.23V Reference 2.5V External Reference Current Mode Control Small 16-Pin SSOP Package

Multiple Supply Hot Swap Controller with I2C Compatible Monitoring Features: Allows Safe Insertion into Live CompactPCI™ or PCI Express™ Backplane 8-Bit ADC Monitors Current and Voltage I2C™/SMBus Interface dI/dt Controlled Soft Start Simultaneous or Sequenced Turn-On ±20V Absolute Maximum Rating for ±12V Supplies No External Gate Capacitor Required Dual-Level Circuit Breaker and Current Limit Bus Precharge Output Power Good Input with Timeout Optional Latch-off or Autoretry After Faults Alerts Host After Faults Integrated LOCAL_PCI_RST# Logic 36-Pin SSOP and 38-Pin (5mm × 7mm) QFN Packages

Photoflash Charger with Adjustable Input Current and IGBT Driver Features: Adjustable Input Current Integrated IGBT Driver No Output Voltage Divider Needed Uses Small Transformers: 5.8mm × 5.8mm × 3mm Fast Photoflash Charge Times Charges Any Size Photoflash Capacitor Supports Operation from Single Li-Ion Cell, Two AA Cells or any Supply from 1.5V Up to 16V Small 10-Lead (3mm × 2mm) DFN Package

18-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs Features: Easy Drive Greatly reduced input kickback Input current reduced to 0.5 μA/MSPS Enhanced acquisition phase, ≥79% of cycle time at 1 MSPS First conversion accurate, no latency or pipeline delay Input span compression for single-supply operation Fast conversion allows low SPI clock rates Input overvoltage clamp protection sinks up to 50 mA SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface High performance Pseudo differential analog input range 0 V to VREF with VREF from 2.4 V to 5.1 V Throughput: 2 MSPS/1 MSPS/500 kSPS options INL: ±3.2 LSB maximum Guaranteed 18-bit, no missing codes SNR: 95 dB at fIN = 1 kHz at VREF = 5 V THD: −125 dB at fIN = 1 kHz, −108 dB at fIN = 100 kHz SINAD: 84.5 dB at fIN = 1 MHz (see Figure 17 in data sheet) Oversampled dynamic range 98 dB for OSR = 2 125 dB for OSR = 1024 Low power Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface 2.5 mW at 500 kSPS (VDD only) 70 μW at 10 kSPS, 14 mW at 2 MSPS (total power) 10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP Pin compatible with AD4003/AD4007/AD4011 family Guaranteed operation: −40°C to +125°C

Single Supply, 24-Bit, Sigma-Delta ADC with 10 V and 0 mA to 20 mA Inputs Features: Internal or external clock Tested for robustness per: IEC61000-4-2, IEC61000-4-3, IEC61000-4-4, IEC61000-4-5, IEC61000-4-6, CISPR 11 24-bit ADC with integrated analog front end Fast and flexible output rate: 1.25 SPS to 31.25 kSPS Channel scan data rate of 6.21 kSPS per channel (161 μs settling) 16 noise free bits at 1 kSPS per channel 85 dB rejection of 50 Hz and 60 Hz at 20 SPS per channel ±10 V inputs, 4 differential or 8 single-ended Pin absolute maximum rating ±50 V Absolute input pin voltage up to ±20 V ≥1 MΩ impedance ±0.06% accuracy at 25°C 0 mA to 20 mA inputs, 4 single-ended Pin absolute maximum rating ±50 mA Input range from −0.5 mA to +24 mA 60 Ω impedance ±0.08% accuracy at 25°C On-chip 2.5 V reference ±0.12% accuracy at 25°C, ±5 ppm/°C (typical) drift Power supplies AVDD = 3.0 V to 5.5 V IOVDD = 2 V to 5.5 V Total IDD = 3.9 mA Temperature range: −40°C to +105°C 3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK) SPI, QSPI, MICROWIRE, and DSP compatible

16-Bit, 16-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADC Features: Easy Drive Reduced analog input and reference drive requirements On-chip reference buffer (WLCSP only) Overvoltage protection up to 5 mA on each analog input Long acquisition phase, ≥71.5% (715 ns/1000 ns) of cycle time at 1 MSPS High performance Sample rate: 500 kSPS (AD4695) or 1 MSPS (AD4696) INL: ±1.0 LSB maximum Guaranteed 16-bit, no missing codes SINAD: 93 dB typical, fIN = 1 kHz Oversampled dynamic range: 111.2 dB, OSR = 64 Small footprint, high channel density 32-lead 5 mm × 5 mm LFCSP 36-ball 2.96 mm × 2.96 mm WLCSP Easy Drive features support system level designs with fewer components Enhanced digital functionality First conversion accurate, no latency or pipeline delay Fast conversion time and dual-/quad-SDO modes allow low SPI clock rates Customizable channel sequencer On-chip oversampling and decimation Threshold detection alerts Offset and gain correction Autonomous conversion (autocycle) mode 1.14 V to 1.98 V logic SPI Low power 8 mW at fS = 1 MSPS and 4 mW at fS = 500 kSPS 4 μW standby power dissipation with the internal LDO disabled Internal LDO enables 3.15 V to 5.5 V, single analog supply operation Wide operating temperature range: −40°C to +125°C

Single Channel, 64-Position, Push-Button, 8% Resistor Tolerance, Nonvolatile Digital Potentiometer Features: Nominal resistor tolerance error: ±8% maximum Wiper current: ±6 mA Rheostat mode temperature coefficient: 35 ppm/°C Low power consumption: 2.5 μA max @ 2.7 V and 125°C Wide bandwidth: 4 MHz (5 kΩ option) Power-on EEPROM refresh time < 50 μs 50-year typical data retention at 125°C 1 million write cycles 2.3 V to 5.5 V supply operation Built-in adaptive debouncer Wide operating temperature: −40°C to +125°C Thin, 2 mm × 2 mm × 0.55 mm, 8-lead LFCSP package