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ADC12DJ1600AAVTQ1

Texas Instruments ADC12DJ1600AAVTQ1

Price
RoHS Y Y Y Y Y Y Y Y Y Y
Lead Status Y Y Y Y Y Y Y Y Y Y
ADC sampling rate(ksps) 25000
Arm CPU Arm Cortex-R4F at 200 MHz
Coprocessors Radar Hardware Accelerator
Frequency range 60 - 64 GHz
Interface type CAN-FD,I2C,LVDS,QSPI,SPI,UART JESD204B,JESD204C
Number of receivers 4
Number of transmitters 3
Operating temperature range(C) -40 -40 -40 to 125 -40 to 125 -40 to 85 -40 -40 -40 -40 -40
Package area(mm^2) 108.16 4 9 9 4 81 100
Package size (L x W)(mm) 10.4 x 10.4 2 x 2 3 x 3 3 x 3 2 x 2 9 x 9 10 x 10
Package type FCCSP WSON WSON WSON WQFN VQFN FCCSP
Pin count 161.0 8.0 12 12 12.0 64.0 144.0
Power supply solution LP87745-Q1
RAM(kByte) 1472
Rating Catalog Catalog Automotive Automotive,Catalog Catalog Automotive Automotive Catalog Catalog Automotive
TI functional safety category Functional Safety-Capable Functional Safety-Capable
TX power(dBm) 12
TI.com inventory 3546 14556 2286 13492 10784 56306 839 1250
Approx. price(US$) 14.43 | 1ku .066 | 1ku .116 | 1ku .1 | 1ku .047 | 1ku .886 | 1ku .85 | 1ku 1.19 | 1ku 32 | 1ku 200.2 | 1ku
Input bias current ()(max)(nA) 25
Iq per channel(typ)(mA) 0.2
Number of channels 2 2 2 1
Output type Open-collector,Open-drain Open-collector CML,LVCMOS,LVDS,LVPECL
Propagation delay time(s) 1 1
Rail-to-rail In to V- No In to V- In to V-
VICR(max)(V) 34.5
VICR(min)(V) 0
Vos (offset voltage at 25C)(max)(mV) 2.5
Vs(max)(V) 36
Vs(min)(V) 2
Vs(Max)(V) 36
Input bias current (+/-)(Max)(nA) 25
Package Group SOIC|8,SOT-23-THIN|8,TSSOP|8,VSSOP|8,WSON|8 SOIC|8,TSSOP|8,VSSOP|8 SOIC|8,TSSOP|8,VSSOP|8
VICR(Max)(V) 0
Vs(Min)(V) 2
Features Standard comparator Cost Optimized,EMI Hardened,Standard Amps Cost Optimized,EMI Hardened,Standard Amps Automotive load dump compatibility,Inrush current control,Linear control,Overvoltage protection,Reverse current blocking,Reverse polarity protection Automotive load dump compatibility,Inrush current control,Linear control,Overvoltage protection,Reverse current blocking,Reverse polarity protection JESD204B Ultra High Speed
VICR(Min)(V) 34.5
Package size mm2 mm2 mm2
Iq per channel(Typ)(mA) 0.2 0.3 0.3
Number of channels(#) 2 2 2
Vos (offset voltage @ 25 C)(Max)(mV) 2.5 3 3
Architecture Bipolar Bipolar Folding Interpolating
Total supply voltage(Max)(+5V=5, +/-5V=10) 36 36
GBW(Typ)(MHz) 1.2 1.2
Offset drift(Typ)(uV/C) 3.5 3.5
Vn at 1 kHz(Typ)(nV/rtHz) 40 40
CMRR(Min)(dB) 75 75
Iq per channel(Max)(mA) 0.5 0.46
Output swing headroom (to positive supply)(Typ)(V) -1.4 -1.4
Total supply voltage(Min)(+5V=5, +/-5V=10) 3 3
Input bias current(Typ)(pA) 10000 10000
Slew rate(Typ)(V/us) 0.5 0.5
CMRR(Typ)(dB) 100 94
Input common mode headroom (to negative supply)(Typ)(V) 0 0
Output current(Typ)(mA) 30 30
Input common mode headroom (to positive supply)(Typ)(V) -1.5 -1.5
Output swing headroom (to negative supply)(Typ)(V) 0.005 0.005
Input bias current(Max)(pA) 35000
Design support EVM,Simulation Model EVM,Simulation Model
Device type Ideal diode controller Ideal diode controller
FET External back-to-back FET External back-to-back FET
IGate pulsed(typ)(A) 2.6 2.6
IGate sink(typ)(mA) 2670 2670
IGate source(typ)(A) 20000 20000
Imax(A) 300 300
Iq(max)(mA) 0.495 0.495
Iq(typ)(mA) 0.412 0.412
Product type Ideal diode controller Ideal diode controller
Shutdown current (ISD) (mA)(A) 0.003 0.003
VGS(max)(V) 15 15
VSense reverse(typ)(mV) -4.5 -4.5
Vin(max)(V) 65 65
Vin(min)(V) 3 3
Current consumption(mA) 106
Frequency(max)(MHz) 2900
Frequency(min)(MHz) 2300
Gain(typ)(dB) 18
Noise figure(typ)(dB) 3.2
OIP3(typ)(dBm) 33
P1dB(typ)(dBm) 18
Type Active Balun
Function Clock network synchronizer
Input type HCSL,LVCMOS,LVDS,LVPECL,XTAL
Number of input channels 2 2
Number of outputs 16
Output frequency(max)(MHz) 3000
Output frequency(min)(MHz) 0.000000000001
RMS jitter(fs) 50
Supply voltage(max)(V) 3.465
Supply voltage(min)(V) 3.135
Analog input BW(MHz) 6000
ENOB(bit) 9.1
Input buffer Yes
Peak-to-peak input voltage range(V) 0.8
Power consumption(typ)(mW) 1760
Resolution(Bits) 12
SFDR(dB) 67
SNR(dB) 57
Sample rate(max)(Msps) 1600