The AD9520-31 provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.72 GHz to 2.25 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used.The AD9520 serial interface supports both SPI and I2C? ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset.The AD9520 features 12 LVPECL outputs in four groups. Any of the 1.6 GHz LVPECL outputs can be reconfigured as two 250 MHz CMOS outputs.Each group of outputs has a divider that allows both the divide ratio (from 1 to 32) and the phase (coarse delay) to be set.The AD9520 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. The external VCO can have an operating voltage up to 5.5 V. A separate output driver power supply can be from 2.375 V to 3.465 V.The AD9520 is specified for operation over the standard industrial range of ?40?C to +85?C.1The AD9520 is used throughout this data sheet to refer to all the members of the AD9520 family. However, when AD9520-3 is used, it is referring to that specific member of the AD9520 family.Applications Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation Broadband infrastructures

Demonstration circuits 1053A-E through 1053A-H exercise the LTC3526L family of high efficiency synchronous boost converters, and are capable of operating with an input voltage range from 0.8V to 5.5V. The 2 × 2 mm DFN thermally enhanced package, high switching frequency (1MHz or 2MHz) and 550mA internal power switches provide a very tiny solution. The LTC3526L family also features output disconnect, and the input voltage can be greater or less than the output voltage. DC1053A-G features the LTC3526L-2 (Burst mode operation) and the DC1053A-H features the LTC3526LB-2 (Burst mode defeated). Both have a 2MHz switching frequency and use a 2.2µH inductor.

The HMC601LP4(E) Logarithmic Detector/Controller converts RF signals at its input, to a proportional DC voltage at its output. The HMC601LP4(E) employ a successive compression topology which delivers extremely high dynamic range and conversion accuracy over a wide input frequency range. As the input power is increased, successive amplifiers move into saturation one by one creating an accurate approximation of the logarithm function.The output of a series of square law detectors is summed, converted into voltage domain and buffered to drive the LOGOUT output. For detection mode, the LOGOUT pin is shorted to the VSET input, and will provide a nominal logarithmic slope of 19mV/dB and an intercept of -100 dBm. The HMC601LP4(E) can also be used in the controller mode where an external voltage is applied to the VSET pin, to create an AGC or APC feedback loop. The HMC601LP4(E) provides a 15/34ns (rise/fall time) response time enabling RF burst detection to a pulse rate beyond 20 MHz.Applications Cellular/PCS/3G WiMAX, WiBro & Fixed Wireless Power Monitoring & Control Circuitry Receiver Signal Strength Indication (RSSI) Automatic Gain & Power Control Circuits

DC1836A-B: Demo Board for the LTC2955 Pushbutton On/Off Controller with Automatic Turn-On.

The ADP1870 / ADP1871?are versatile current-mode, synchronous step-down controllers that provide superior transient response, optimal stability, and current-limit protection by using a constant on-time, pseudo-fixed frequency with a programmable current limit, current-control scheme. In addition, these devices offer optimum performance at low duty cycles by utilizing valley current-mode control architecture. This allows the ADP1870 / ADP1871 to drive all N-channel power stages to regulate output voltages as low as 0.6 V.The ADP1871 is the power saving mode (PSM) version of the device and is capable of pulse skipping to maintain output regulation while achieving improved system efficiency at light loads (see the Power Saving Mode (PSM) Version (ADP1871) section for more information).Available in three frequency options (300 kHz, 600 kHz, and 1.0 MHz, plus the PSM option), the ADP1870 / ADP1871 are well suited for a wide range of applications that require a single-input power supply range from 2.95 V to 20 V. Low voltage biasing is supplied via a 5 V internal LDO.In addition, an internally fixed soft start period is included to limit input in-rush current from the input supply during startup and to provide reverse current protection during soft start for a precharged output. The low-side current-sense, current-gain scheme and integration of a boost diode, along with the PSM/forced pulse width modulation (PWM) option, reduce the external part count and improve efficiency.The ADP1870 / ADP1871 operate over the -40?C to +125?C junction temperature range and are available in 10-lead MSOP package.

Demo circuit 1069A is a monolithic step-down switching regulator with LDO featuring LT3500. The demo circuit is designed for 5.0V and 3.3V outputs from a 6V to 36V input. The LDO output is configured as a post-regulator of the switching regulator output. The total current capability is up to 2A. The switching regulator can be synchronized to an external clock input or be resistor-programmed to a 250kHz to 2.2MHz internal oscillator. Programmable frequency allows for optimization between efficiency and external component size. Cycle-by-cycle current limit, frequency foldback and thermal shutdown provide protections against a shorted output. The soft-start feature controls the ramp rate of the output voltage, eliminates input current surge during startup, and also provides output tracking.

Demonstration circuit 1562B is an engineering tool to design and evaluate the LTC699X-X family of TimerBlox® circuits. The center section of the board contains a preconfigured TimerBlox function. DC1562B comes in twelve timing function variations as outlined in Table 1.

The AD9635 is a dual, 12-bit, 80 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) forsignaling a new output byte are provided. Individual channelpower-down is supported; the AD9635 typically consumes lessthan 2 mW in the full power-down state. The ADC providesseveral features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9635 is available in a RoHS-compliant, 32-lead LFCSP. It is specified over the industrial temperature range of ?40?Cto +85?C. PRODUCT HIGHLIGHTS Small Footprint. Two ADCs are contained in a small, spacesaving package. Low Power. The AD9635 uses 115 mW/channel at 125 MSPS with scalable power options. Pin Compatibility with the AD9645, a 14-Bit Dual ADC. Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Broadband data applications Battery-powered instruments Hand held scope meters Portable medical imaging and ultrasound Radar/LIDAR

Demo circuit 1560A is an isolated flyback μModule® DC/DC converter with LDO post regulator featuring LTM8048. The demo circuit is designed for a 6V flyback output and a 5V post regulator output from a 4.5V to 30V input. The typical current capability of the 6V flyback output varies with input voltage from about 110mA at VIN = 4.5V to about 370mA at VIN = 30V. The circuit provides 725VDC isolation.

The LTC4162-S is an advanced monolithic synchronous step-down switching battery charger and PowerPath? manager that seamlessly manages power distribution between input sources such as wall adapters, backplanes, solar panels, etc., and a lead-acid battery.A high resolution measurement system provides extensive telemetry information for circuit voltages, currents, battery resistance and temperature which can all be read back over the I2C port. The I2C port can also be used to configure many charging parameters including charging voltages and currents, termination algorithms and numerous system status alerts.The LTC4162-S can charge 6V, 12V, 18V and 24V lead-acid batteries with as much as 3.2A of charge current.The power path topology decouples the output voltage from the battery allowing a portable product to start up instantly under very low battery voltage conditions.The LTC4162-S is available in a thermally enhanced 28-pin 4mm ? 5mm ? 0.75mm QFN surface mount package.Applications Medical Instruments USB-C Power Delivery Industrial Handhelds Ruggedized Notebook Tablet Computers