The ADRV9009 is a highly integrated, radio frequency (RF), agile transceiver offering dual transmitters and receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption demanded by 3G, 4G, and 5G macro cell time division duplex (TDD) base station applications.The receive path consists of two independent, wide bandwidth, direct conversion receivers with state-of-the-art dynamic range. The device also supports a wide bandwidth, time shared observation path receiver (ORx) for use in TDD applications. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, thus eliminating the need?for these functions in the digital baseband. Several auxiliary functions, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose inputs/outputs (GPIOs) for the power amplifier (PA), and RF front-end control are also integrated.In addition to automatic gain control (AGC), the ADRV9009 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time ?-? ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing, relaxes the requirements of the RF filters when compared to traditional intermediate frequency (IF) receivers.The transmitters use an innovative direct conversion modulator that achieves high modulation accuracy with exceptionally low noise.The observation receiver path consists of a wide bandwidth, direct conversion receiver with state-of-the-art dynamic range.The fully integrated phase-locked loop (PLL) provides high performance, low power, fractional-N RF frequency synthesis for the transmitter (Tx) and receiver (Rx) signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multichip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9009 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, thus reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9009 can be powered directly from 1.3 V regulators and 1.8 V regulators, and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9009 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G TDD macrocell base stations TDD active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment

TThe SSM3582A is a fully integrated, high efficiency, digital input stereo Class-D audio amplifier. The device can operate from a single supply and requires only a few external components, significantly reducing the circuit bill of materials.A proprietary, spread spectrum ?-? modulation scheme enables direct connection to the speaker and ensures state-of-the-art analog performance while lowering radiated emissions compared to other Class-D architectures. An optional ultralow electromagnetic interference (EMI) mode significantly reduces radiated emissions above 100 MHz, enabling longer speaker cable lengths. Audio is transmitted digitally to the amplifier, minimizing the possibility of signal corruption in digital environments. The amplifier provides outstanding analog performance, with a 106 dB signal-to-noise ratio and a low 0.004% total harmonic distortion + noise (THD + N).The SSM3582A operates from a single 4.5 V to 16.5 V supply and is capable of delivering 2? 15 W rms continuously into 8 ? and 4 ? loads at The pulse code modulation (PCM) audio serial port supports most common protocols, such as I2S, left justified, and time division multiplexing (TDM), and can address up to 16 devices on a single interface, for up to 32 audio playback channels.IC operation is controlled through a dedicated I2C interface. The two ADDRx pins (2?, five-level) define up to 16 individual addresses in I2C and standalone modes and automatically set the default TDM slots attribution.A micropower shutdown mode is triggered by removing the digital audio interface clock, with a typical current of An automatic power-down feature shuts down the amplifier and the digital-to-analog converter (DAC) when no signal is present at the input, minimizing power consumption during digital silence. The device restarts when nonzero data is present at the input. Mute and unmute transitions are pop and click free.The SSM3582A is specified over the commercial temperature range of ?40?C to +85?C. The device has built in thermal shutdown and output short-circuit protection, as well as an early thermal warning with programmable gain limiting to maintain operation.The SSM3582A is available in a 40-lead, 6 mm ? 6 mm lead frame chip scale package (LFCSP), with a thermal pad to improve heat dissipation.Applications Mobile computing All in one computers Portable electronics Wireless speakers Televisions

The ADPD2211 is an optical sensor optimized for biomedical applications. Very low power consumption and near theoretical signal-to-noise ratio (SNR) are achieved by packaging an ultralow capacitance deep junction silicon photodiode operated in zero bias photoconductive mode with a low noise current amplifier. The ADPD2211 offers a typical 400 kHz bandwidth performance, which is well suited for use with pulsed excitation. The ADPD2211 uses very little power during operation and incorporates a power-down pin, enabling power cycling to optimize battery life in portable applications. The ADPD2211 provides shot noise limited performance, making it an excellent choice for measuring signals with the highest possible fidelity in low light conditions. This combination of low power, very high SNR, and electromagnetic interference (EMI) immunity enables low power system solutions not possible with traditional photodiode (PD) and transimpedance amplifier (TIA) systems.Applications Heart rate, pulse oximetry monitoring (photoplethysmography) Battery-powered medical sensors Chemical analysis

Demonstration circuit SCP-ADP150-EVALZ features the ADP150, an ultralow noise (9μV), low dropout, linear regulator that operates from 2.2V to 5.5V and provides up to 150mA of output current. ADP150AUJZ-3.3-R7 fixed volt-age IC is installed on this board. Like all boards in the Signal Chain Power series, this board is designed to be easily plugged into other SCP boards to form a complete signal chain power system, enabling fast evaluation of low power signal chains. To evaluate this board, some universal SCP hardware is required, namely: SCP-INPUT-EVALZ SCP-OUTPUT-EVALZ SCP-FILTER-EVALZ SCP-THRUBRD-EVALZ SCP-1X2BKOUT-EVALZ SCP-1X5BKOUT-EVALZ SCP-5X1-EVALZ   To properly evaluate SCP series demo boards, you will need the SCP Configurator companion software. SCP Configurator can help you choose the right board and topology for your design. Note that the Demo Manual does not cover details important to the operation and configuration regarding the ADP150. Please refer to the ADP150 datasheet for a complete description of the part.

The ADuM4165/ADuM4166 are USB 2.0 port isolators, utilizing Analog Devices, Inc., iCoupler? technology to dynamically support all USB 2.0 data rates; low (1.5 Mbps), full (12 Mbps), or high (480 Mbps), as required. The devices support host isolation with automatic speed negotiation as well as peripheral isolation.High speed data is retimed for jitter reduction, requiring an external clock signal or crystal input. The ADuM4165 supports the clock or crystal input on the upstream side, and the ADuM4166 supports the clock or crystal input on the downstream side, offering two options to best suit the system design.The low power standby mode for downstream (Side 2) supports applications with limited available power, such as battery-operated peripherals. The upstream (Side 1) standby current meets USB 2.0 requirements for suspended operation.The isolators are specified over an extended industrial temperature range of ?55?C to +125?C and are available in a 20-lead, wide-body, increased creepage SOIC_IC with 8.3 mm creepage and clearance.APPLICATIONS USB peripheral, USB host, and USB hub isolation Electronic test and measurement equipment Medical devices and integrated PCs Industrial PCs and isolated USB ports for debug or upgrade USB isolator modules and USB cable isolatorsProtected by U.S. Patents 7,075,329; 8,432,182; 8,525,547; and 8,564,327. Other patents are pending.

The AD8310 is a complete, dc to 440 MHz demodulating logarithmic amplifier (log amp) with a very fast voltage mode output, capable of driving up to 25 mA into a grounded load in under 15 ns. It uses the progressive compression (successive detection) technique to provide a dynamic range of up to 95 dB to ?3 dB law conformance or 90 dB to a ?1 dB error bound up to 100 MHz. It is extremely stable and easy to use, requiring no significant external components. A single-supply voltage of 2.7 V to 5.5 V at 8 mA is needed, corresponding to a power consumption of only 24 mW at 3 V. A fast-acting CMOS-compatible enable pin is provided.Each of the six cascaded amplifier/limiter cells has a small-signal gain of 14.3 dB, with a ?3 dB bandwidth of 900 MHz. A total of nine detector cells are used to provide a dynamic range that extends from ?91 dBV (where 0 dBV is defined as the amplitude of a 1 V rms sine wave), an amplitude of about ?40 ?V, up to +4 dBV (or ?2.2 V). The demodulated output is accurately scaled, with a log slope of 24 mV/dB and an intercept of ?108 dBV. The scaling parameters are supply- and temperature-independent.The fully differential input offers a moderately high impedance (1 k? in parallel with about 1 pF). A simple network can match the input to 50 ? and provide a power sensitivity of ?78 dBm to +17 dBm. The logarithmic linearity is typically within ?0.4 dB up to 100 MHz over the central portion of the range, but it is somewhat greater at 440 MHz. There is no minimum frequency limit; the AD8310 can be used down to low audio frequencies. Special filtering features are provided to support this wide range.The output voltage runs from a noise-limited lower boundary of 400 mV to an upper limit within 200 mV of the supply voltage for light loads. The slope and intercept can be readily altered using external resistors. The output is tolerant of a wide variety of load conditions and is stable with capacitive loads of 100 pF.The AD8310 provides a unique combination of low cost, small size, low power consumption, high accuracy and stability, high dynamic range, a frequency range encompassing audio to UHF, fast response time, and good load-driving capabilities, making this product useful in numerous applications that require the reduction of a signal to its decibel equivalent.The AD8310 is available in the industrial temperature range of ?40?C to +85?C in an 8-lead MSOP package.Applications Conversion of signal level to decibel form Transmitter antenna power measurement Receiver signal strength indication (RSSI) Low cost radar and sonar signal processing Network and spectrum analyzers Signal-level determination down to 20 Hz True-decibel ac mode for multimeters

The AD9912 is a direct digital synthesizer (DDS) that features an integrated 14-bit digital-to-analog converter (DAC). The AD9912 features a 48-bit frequency tuning word (FTW) that can synthesize frequencies in step sizes no larger than 4 ?Hz. Absolute frequency accuracy can be achieved by adjusting the DAC system clock.The AD9912 also features an integrated system clock phase-locked loop (PLL) that allows for system clock inputs as low as 25 MHz.The AD9912 operates over an industrial temperature range, spanning ?40?C to +85?C.APPLICATIONS Agile LO frequency synthesis Low jitter, fine tune clock generation Test and measurement equipment Wireless base stations and controllers Secure communications Fast frequency hopping

Demonstration circuit 1590B is a dual output synchronous buck converter featuring the LTC3880EUJ, a dual output peak current mode controller with digital power system management. There are two versions of the board available: DC1590B-A senses the output current across a sense resistor and has a default switching frequency of 350kHz, and DC1590B-B senses output current with the inductor DCR and has a default switching frequency of 425kHz. Either version can be populated with the LTC3880EUJ-1 (which allows the user to provide bias power to the IC from an external power supply) instead of the LTC3880EUJ. These boards provide two programmable outputs of 20A each. The factory default settings are 1.8V for each output.

The AD9255 is a 14-bit, 125 MSPS analog-to-digital converter (ADC). The AD9255 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 14-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9255 is suitable for applications in communications, instrumentation, and medical imaging.A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on-chip dither function is available to improve SFDR performance with low power analog input signals.The AD9255 is available in a Pb-free, 48-lead LFCSP and is specified over the industrial temperature range of ?40?C to +85?C.PRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode. ?Pin compatibility with the AD9265, allowing a simple migration up to 16 bits.Applications Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipment

The AD5668 device is a low power, octal, 16-bit, buffered voltage-output DAC. All devicesoperate from a single 2.7 V to 5.5 V supply and are guaranteedmonotonic by design. The AD5668 and AD5628 are available inboth a 4 mm ? 4 mm LFCSP and a 16-lead TSSOP, while theAD5648 is available in both a 14-lead and 16-lead TSSOP.The AD5628/AD5648/AD5668 have an on-chip reference withan internal gain of 2. The AD5628-1/AD5648-1/AD5668-1 havea 1.25 V 5 ppm/?C reference, giving a full-scale output rangeof 2.5 V; the AD5628-2/AD5648-2/AD5668-2 and AD5668-3 havea 2.5 V 5 ppm/?C reference, giving a full-scale output range of5 V. The on-board reference is off at power-up, allowing the useof an external reference. The internal reference is enabled via asoftware write.The part incorporates a power-on reset circuit that ensures that theDAC output powers up to 0 V (AD5628-1/AD5648-1/AD5668-1,AD5628-2/AD5648-2/AD5668-2) or midscale (AD5668-3) andremains powered up at this level until a valid write takes place.The part contains a power-down feature that reduces the currentconsumption of the device to 400 nA at 5 V and provides software-selectable output loads while in power-down mode for any or allDAC channels. The outputs of all DACs can be updated simultaneouslyusing the LDAC function, with the added functionalityof user-selectable DAC channels to simultaneously update. Thereis also an asynchronous CLR that updates all DACs to a userprogrammablecode?zero scale, midscale, or full scale.The AD5628/AD5648/AD5668 utilize a versatile 3-wire serialinterface that operates at clock rates of up to 50 MHz and iscompatible with standard SPI?, QSPI?, MICROWIRE?, andDSP interface standards. The on-chip precision output amplifierenables rail-to-rail output swing.Product Highlights Octal, 12-/14-/16-bit DAC. On-chip 1.25 V/2.5 V, 5 ppm/?C reference. Available in 14-lead/16-lead TSSOP, 16-lead LFCSP, and 16-ball WLCSP. Power-on reset to 0 V or midscale. Power-down capability. When powered down, the DAC typically consumes 200 nA at 3 V and 400 nA at 5 V. Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators