The ADAU1962A is a high performance, single-chip digital-to-analog converter (DAC) that provides 12 DACs with differential or single-ended outputs using the Analog Devices, Inc., patented multibit Σ-Δ architecture. A serial peripheral interface (SPI)/I2C port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1962A operates from 2.5 V digital and 3.3 V analog supplies. A linear regulator is included to generate the digital supply voltage from the analog supply voltage. The ADAU1962A is available in an 80-lead LQFP.The ADAU1962A is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the internal master clock from an external left-right frame clock (LRCLK), the ADAU1962A can eliminate the need for a separate high frequency master clock andcan be used with or without a bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 2.5 V digital supplies, power consumption is minimized, and the digital waveforms are asmaller amplitude, further reducing emissions.Note that throughout this data sheet, multifunction pins, such as SCLK/SCL, are referred to by the entire pin name or by a single function of the pin, for example, SCLK, when only that function is relevant.APPLICATIONS Automotive audio systems Home theater systems Digital audio effects processors

The ADAU1966A is a high performance, single-chip digital-to-analog converter (DAC) that provides 16 DACs with differential or single-ended outputs using the Analog Devices, Inc., patented multibit sigma-delta (Σ-Δ) architecture. A serial peripheral interface (SPI)/I2C port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1966A operates from 2.5 V digital and 3.3 V analog supplies. A linear regulator is included to generate the digital supply voltage from the analog supply voltage. The ADAU1966A is available in an 80-lead LQFP.The ADAU1966A is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the internal master clock from an external left-right frame clock (LRCLK), the ADAU1966A can eliminate the need for a separate high frequency master clock and can be used with or without a bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 2.5 V digital supplies, power consumption is minimized, and the digital waveforms are a smaller amplitude, further reducing emissions.Note that throughout this data sheet, multifunction pins, such as SCLK/SCL, are referred to by the entire pin name or by a single function of the pin, for example, SCLK, when only that function is relevant.APPLICATIONS Automotive audio systems Home theater systems Digital audio effects processors

The ADAU1979 incorporates four high performance, analog-to-digital converters (ADCs) with 4.5 V rms capable ac-coupled inputs. The ADCs use a multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI. An I2C/serial peripheral interface (SPI) control port is included that allows a microcontroller to adjust volume and many other parameters. The ADAU1979 uses only a single 3.3 V supply. The device internally generates the required digital DVDD supply. The low power architecture reduces the power consumption. The on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with the frame clock, it eliminates the need for a separate high frequency master clock in the system. The ADAU1979 is available in a 40-lead LFCSP package.Note that throughout the data sheet, multifunction pins, such as SCL/CCLK, are referred to either by the entire pin name or by a single function of the pin, for example, CCLK, when only that function is relevant.APPLICATIONS Automotive audio systems Active noise cancellation systems

The LTC2145-12/LTC2144-12/LTC2143-12 are 2-channel simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.6dB SNR and 89dB spurious free dynamic range (SFDR). Ultralow jitter of 0.08psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.3LSBRMS.The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2145-12 12 LTC2145-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2378-18 is a low noise, low power, high speed 18-bit successive approximation register (SAR) ADC. Operating from a 2.5V supply, the LTC2378-18 has a ±VREF fully differential input range with VREF ranging from 2.5V to 5.1V. The LTC2378-18 consumes only 13.5mW and achieves ±1.75LSB INL maximum, no missing codes at 18 bits with 102dB SNR.The LTC2378-18 has a high speed SPI-compatible serial interface that supports 1.8V, 2.5V, 3.3V and 5V logic while also featuring a daisy-chain mode. The fast 1Msps throughput with no cycle latency makes the LTC2378-18 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2378-18 automatically powers down between conversions, leading to reduced power dissipation that scales with the sampling rate.The LTC2378-18 features a unique digital gain compression (DGC) function, which eliminates the driver amplifier’s negative supply while preserving the full resolution of the ADC. When enabled, the ADC performs a digital scaling function that maps zero-scale code from 0V to 0.1 • VREF and full-scale code from VREF to 0.9 • VREF. For a typical reference voltage of 5V, the full-scale input range is now 0.5V to 4.5V, which provides adequate headroom for powering the driving amplifier from a single 5.5V supply.Applications Medical Imaging High Speed Data Acquisition Portable or Compact Instrumentation Industrial Process Control Low Power Battery-Operated Instrumentation ATE

The LTC2389-18 is a low noise, high speed 18-bit successive approximation register (SAR) ADC. Operating from a single 5V supply, the LTC2389-18 supports pin-configurable fully differential (±4.096V), pseudo-differential unipolar (0V to 4.096V), and pseudo-differential bipolar (±2.048V) analog input ranges, allowing it to interface with multiple signal chain formats without requiring additional level translation or signal conditioning. The LTC2389-18 achieves ±3LSB INL (maximum), no missing codes at 18-bits, and 99.8dB (fully differential)/95.2dB (pseudo differential) SNR (typical).The LTC2389-18 includes a precision internal 4.096V reference, with a guaranteed 0.5% initial accuracy and a ±20ppm/°C (maximum) temperature coefficient, as well as an internal reference buffer. Fast 2.5Msps throughput with no cycle latency in the parallel interface modes makes the LTC2389-18 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2389-18 dissipates only 162.5mW at 2.5Msps, while both nap and sleep power-down modes are provided to further reduce power consumption during inactive periods.Applications Medical Imaging High Speed, Wide Dynamic Range Data Acquisition Industrial Process Control Instrumentation ATE

The LTC2270 is a two-channel simultaneous sampling 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding applications with AC performance that includes 84.1dB SNR and 99dB spurious free dynamic range (SFDR).DC specs include ±1LSB INL (typ), ±0.2LSB DNL (typ) and no missing codes over temperature. The transition noise is 1.44LSBRMS.The digital outputs can be either full rate CMOS, Double Data Rate CMOS, or Double Data Rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.Applications Low Power Instrumentation Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition

Data Conversion IC Development Tools LTC2261-14: 14-bit, 125Msps ADC, LVDS Ou

ADC, 16BIT, PLCC-44, -40 TO 85DEG C ROHS COMPLIANT: YES

ADC, 24BIT, DIP-24, -40 TO 105DEG C ROHS COMPLIANT: YES