16-Channel, 1 MSPS, 12-Bit ADC with Sequencer Features: Fast throughput rate: 1 MSPS Specified for VDD of 2.7 V to 5.25 V Low power at maximum throughput rates 5.4 mW maximum at 870 kSPS with 3 V supplies 12.5 mW maximum at 1 MSPS with 5 V supplies 16 (single-ended) inputs with sequencer Wide input bandwidth: 69.5 dB SNR at 50 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface, SPI/QSPI™/MICROWIRE™/ DSP compatible Full shutdown mode: 0.5 μA maximum 28-lead TSSOP and 32-lead LFCSP packages AEC-Q100 qualified for automotive applicationsAD7490-EP supports defense and aerospace applications (AQEC standard) Download AD7490-EP Data Sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/12635 DSCC Drawing Number

16-Bit, Isolated, Sigma-Delta Modulator Features:5 MHz to 21 MHz master clock input frequencyOffset drift vs. temperature: 0.25 V/C maximumSNR: 82 dB typical16 bits, no missing codesFull-scale analog input voltage range: 64 mVENOB: 13 bits typicalIDD1: 10 mA maximumOn-board digital isolatorOperating temperature range40C to +125C (16-lead SOIC_W)40C to +105C (8-lead SOIC_IC)High isolation common-mode transient immunity:150 kV/s minimum, VDD2 = 3.3 VWide-body SOICs16-lead SOIC_W8-lead SOIC_IC with increased creepageSafety and regulatory approvalsUL recognition5700 V rms for 1 minute per UL 1577CSA Component Acceptance Notice 5AVDE Certificate of ConformityDIN V VDE V 0884-10: VIORM = 1270 VPEAKDIN V VDE V 0884-11: VIORM = 1060 VPEAK (pending)

16-Bit, Isolated, Sigma-Delta Modulator Features:5 MHz to 21 MHz master clock input frequencyOffset drift vs. temperature: 0.25 V/C maximumSNR: 82 dB typical16 bits, no missing codesFull-scale analog input voltage range: 64 mVENOB: 13 bits typicalIDD1: 10 mA maximumOn-board digital isolatorOperating temperature range40C to +125C (16-lead SOIC_W)40C to +105C (8-lead SOIC_IC)High isolation common-mode transient immunity:150 kV/s minimum, VDD2 = 3.3 VWide-body SOICs16-lead SOIC_W8-lead SOIC_IC with increased creepageSafety and regulatory approvalsUL recognition5700 V rms for 1 minute per UL 1577CSA Component Acceptance Notice 5AVDE Certificate of ConformityDIN V VDE V 0884-10: VIORM = 1270 VPEAKDIN V VDE V 0884-11: VIORM = 1060 VPEAK (pending)

Single Channel, 16-Bit Current/Voltage Output DAC with HART Connectivity Features: 16-bit resolution and monotonicity Current or voltage output available on a single terminal Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA, 0 mA to 24 mA, ±20 mA, ±24 mA, and −1 mA to +22 mA Voltage output ranges (with 20% overrange): 0 V to 5 V, 0 V to 10 V, ±5 V, and ±10 V User programmable offset and gain Advanced on-chip diagnostics, including a 12-bit ADC On-chip reference −40°C to +115°C temperature range 32-Lead, 5 mm × 5 mm LFCSP package

Dual, 16-Bit, 12.6 GSPS RF DAC and Direct Digital Synthesizer Features: Supports multiband wireless applications 3 bypassable, complex data input channels per RF DAC 3.08 GSPS maximum complex input data rate per input channel 1 independent NCO per input channel Proprietary, low spurious and distortion design 2-tone IMD3 = −83 dBc at 1.84 GHz, −7 dBFS/tone RF output SFDR <−80 dBc at 1.84 GHz, −7 dBFS RF output Flexible 8-lane, 15.4 Gbps JESD204B interface Supports single-band and multiband use cases Supports 12-bit high density mode for increased data throughput Multiple chip synchronization Supports JESD204B Subclass 1 Selectable interpolation filter for a complete set of input data rates 1×, 2×, 3×, 4×, 6×, and 8× configurable data channel interpolation 1×, 2×, 4×, 6×, 8×, and 12× configurable final interpolation Final 48-bit NCO that operates at the DAC rate to support frequency synthesis up to 6 GHz Transmit enable function allows extra power saving and downstream circuitry protection High performance, low noise PLL clock multiplier Supports 12.6 GSPS DAC update rate Observation ADC clock driver with selectable divide ratios Low power 2.54 W with 2 DACs at 12 GSPS, DAC PLL on 10 mm × 10 mm, 144-ball BGA_ED with metal enhanced thermal lid, 0.80 mm pitch

14-Bit, 3 GSPS, JESD204B, Single Analog-to-Digital Converter Features: JESD204B (Subclass 1) coded serial digital outputs Support for lane rates up to 16 Gbps per lane 2 W total power at 3 GSPS (default settings) Performance at −2 dBFS amplitude, 2.6 GHz input SFDR = 70 dBFS SNR = 57.2 dBFS Performance at −9 dBFS amplitude, 2.6 GHz input SFDR = 78 dBFS SNR = 59.5 dBFS Integrated input buffer Noise density = −152 dBFS/Hz 0.975 V, 1.9 V, and 2.5 V dc supply operation 9 GHz analog input full power bandwidth (−3 dB) Amplitude detect bits for efficient AGC implementation 4 integrated digital downconverters 48-bit NCO 4 cascaded half-band filters Phase coherent NCO switching Up to 4 channels available Serial port control Integer clock with divide by 2 and divide by 4 options Flexible JESD204B lane configurations On-chip dither AEQ-Q100 qualified for automotive applications

IC DAC DUAL 16BIT 32TQFP; Resolution (Bits):16bit; Sampling Rate:84.6MSPS; Input Channel Type:Serial; Supply Voltage Range:± 11.4V to ± 16.5V; ADC / DAC Case Style:QFP; No. of Pins:32Pins; Data Interface:SPI; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:-; Automotive Qualification Standard:-; MSL:MSL 3 - 168 hours; SVHC:No SVHC (20-Jun-2016); IC Case Style:QFP; No. of Outputs:2Outputs; Operating Temperature Range:-40°C to +85°C; Sample Rate:84.6MSPS; Settling Time:8µs; Supply Current:4.25mA; Supply Voltage Range - Digital:2.7V to 5.25V; Termination Type:Surface Mount Device

ADC 12BIT WSOIC-28; Resolution (Bits):12bit; Sampling Rate:-; Supply Voltage Type:Dual (+/-); Supply Voltage Min:11.4V; Supply Voltage Max:16.5V; ADC / DAC Case Style:WSOIC; No. of Pins:28Pins; Input Channel Type:Bipolar Unipolar; Data Interface:-; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:Single 12-Bit SAR ADCs; Automotive Qualification Standard:-; MSL:MSL 3 - 168 hours; SVHC:No SVHC (20-Jun-2016)

ADC 12BIT 40MSPS LFCSP-32; Resolution (Bits):12bit; Sampling Rate:40MSPS; Supply Voltage Type:Single; Supply Voltage Min:2.7V; Supply Voltage Max:3.6V; ADC / DAC Case Style:LFCSP; No. of Pins:32Pins; Input Channel Type:Differential Single Ended; Data Interface:-; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:12-Bit Pipelined ADCs; Automotive Qualification Standard:-; MSL:MSL 3 - 168 hours; SVHC:No SVHC (20-Jun-2016)

12-Bit R/D Converter with Reference Oscillator Features: Complete monolithic resolver-to-digital converter (RDC) Parallel and serial 12-bit data ports System fault detection ±11 arc minutes of accuracy Input signal range: 3.15 VP-P ± 27% Absolute position and velocity outputs 1250 rps maximum tracking rate, 12-bit resolution Incremental encoder emulation (1024 pulses/rev) Programmable sinusoidal oscillator on board Single-supply operation (5.00 V ± 5%) −40°C to +125°C temperature rating 44-lead LQFP