EVAL PCB ASSY / EB/PCB

ATTENUATORS / GEL_PACK

13GHZ FAST RAMP DIRECT MOD FRAC N PLL / REEL7

The ADG901/ADG902 are wideband switches that use a complementary metal-oxide semiconductor (CMOS) process to provide high isolation and low insertion loss to 1 GHz. The ADG901 is an absorptive (matched) switch with 50 ? terminated shunt legs, while the ADG902 is a reflective switch. These devices are designed such that the isolation is high over the dc to 1 GHz frequency range. These switches enable the user to pass dc signals up to 0.5 V without the use of a dc blocking capacitor. They have on-board CMOS control logic, thus eliminating the need for external controlling circuitry. The control inputs are both CMOS and LVTTL compatible. The low power consumption of these CMOS devices makes them ideally suited to wireless applications and general-purpose high frequency switching.Product Highlights 40 dB Off Isolation at 1 GHz 0.8 dB Insertion Loss at 1 GHz 17 dBm P1dB at 1 GHzApplications Wireless communications General purpose RF switching Dual-band applications High speed filter selection Digital transceiver front-end switch IF switching Tuner modules Antenna diversity switching list

The AD6655 is a mixed-signal intermediate frequency (IF) receiver consisting of dual 14-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS ADCs and a wideband digital downconverter (DDC). The AD6655 is designed to support communications applications where low cost, small size, and versatility are desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.ADC data outputs are internally connected directly to the digital downconverter (DDC) of the receiver, simplifying layout and reducing interconnection parasitics. The digital receiver has two channels and provides processing flexibility. Each receive channel has four cascaded signal processing stages: a 32-bit frequency translator (numerically controlled oscillator (NCO)), a half-band decimating filter, a fixed FIR filter, and an fADC/8 fixed-frequency NCO.In addition to the receiver DDC, the AD6655 has several functions that simplify the automatic gain control (AGC) function in the system receiver. The fast detect feature allows fast overrange detection by outputting four bits of input level information with short latency.In addition, the programmable threshold detector allows monitoring of the incoming signal power using the four fast detect bits of the ADC with low latency. If the input signal level exceeds the programmable threshold, the coarse upper threshold indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition.The second AGC-related function is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system.After digital processing, data can be routed directly to the two external 14-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or as 1.8 V LVDS. The CMOS data can also be output in an interleaved configuration at a double data rate using only Port A.The AD6655 receiver digitizes a wide spectrum of IF frequencies. Each receiver is designed for simultaneous reception of the main channel and the diversity channel. This IF sampling architecture greatly reduces component cost and complexity compared with traditional analog techniques or less integrated digital methods.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.The AD6655 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.Product Highlights Integrated dual, 14-bit, 150 MSPS ADC. Integrated wideband decimation filter and 32-bit complex NCO. Fast overrange detect and signal monitor with serial output. Proprietary differential input maintains excellent SNR performance for input frequencies up to 450 MHz. Flexible output modes, including independent CMOS, interleaved CMOS, IQ mode CMOS, and interleaved LVDS. SYNC input allows synchronization of multiple devices. 3-bit SPI port for register programming and register readback.Applications Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Broadband data applications

The ADL5523 is a high performance GaAs pHEMT low noise amplifier. It provides high gain and low noise figure for single-downconversion IF sampling receiver architectures as well as direct-downconversion receivers.The ADL5523 provides a high level of integration by incorporating the active bias and the dc blocking capacitors, making it very easy to use while not sacrificing design flexibility.The ADL5523 is easy to tune, requiring only a few external components. The device can support operation from 3 V to 5 V, and the current draw can be adjusted with the external bias resistor for applications requiring very low power consumption.The ADL5523 comes in a compact, thermally enhanced, 3 mm × 3 mm LFCSP and operates over the temperature range of −40°C to +85°C.A fully populated evaluation board is also available.

The ADL5562 is a high performance differential amplifier optimized for RF and IF applications. The amplifier offers low noise of 2.1 nV/√Hz and excellent distortion performance over a wide frequency range, making it an ideal driver for high speed 8-bit to 16-bit ADCs.The ADL5562 provides three gain levels of 6 dB, 12 dB, and 15.5 dB through a pin-strappable configuration. For the single-ended input configuration, the gains are reduced to 5.6 dB, 11.1 dB, and 14.1 dB. Using an external series input resistor expands the amplifier gain flexibility and allows for any gain selection from 0 dB to 15.5 dB.The quiescent current of the ADL5562 is typically 80 mA and, when disabled, consumes less than 3 mA, offering excellent input-to-output isolation.The device is optimized for wideband, low distortion performance. These attributes, together with its adjustable gain capability, make this device the amplifier of choice for general-purpose IF and broadband applications where low distortion, noise, and power are critical. This device is optimized for the best combination of slew speed, bandwidth, and broadband distortion. These attributes allow it to drive a wide variety of ADCs and make it ideally suited for driving mixers, pin diode attenuators, SAW filters, and multielement discrete devices.Fabricated on an Analog Devices, Inc., high speed SiGe process, the ADL5562 is supplied in a compact 3 mm × 3 mm, 16-lead LFCSP package and operates over the temperature range of −40°C to + 85°C.APPLICATIONS Differential ADC drivers Single-ended to differential conversion RF/IF gain blocks SAW filter interfacing

The ADF4154 is a fractional-N frequency synthesizer that implements local oscillators in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registersdefine an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A key feature of the ADF4154 is the fast-lock mode with a builtintimer. The user can program a predetermined count-down time value so that the PLL will remain in wide bandwidth mode, instead of having to control this time externally.Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V, and can be powered down when not in use.

The ADL5370 is the first in the fixed-gain quadrature modulator(F-MOD) family designed for use from 300 MHz to 1000 MHz.Its excellent phase accuracy and amplitude balance enable highperformance intermediate frequency or direct radio frequencymodulation for communication systems.The ADL5370 provides a greater than 500 MHz, 3 dB basebandbandwidth, making it ideally suited for use in broadband zeroIF or low IF-to-RF applications and in broadband digitalpredistortion transmitters.The ADL5370 accepts two differential baseband inputs and asingle-ended LO and generates a single-ended 50 Ω output.The ADL5370 is fabricated using the Analog Devices, Inc.advanced silicon-germanium bipolar process. It is available in a24-lead, exposed-paddle, Pb-free, LFCSP package. Performance isspecified over a −40°C to +85°C temperature range. A Pb-freeevaluation board is available.Applications Cellular communication systems at 450 MHz CDMA2000/GSM WiMAX/broadband wireless access systems Cable communication equipment Satellite modems

The ADL5372 is a member of the fixed-gain quadrature modulator(F-MOD) family designed for use from 1500 MHz to 2500 MHz.Its excellent phase accuracy and amplitude balance enable highperformance intermediate frequency or direct radio frequencymodulation for communication systems.The ADL5372 provides a >500 MHz, 3 dB baseband bandwidth,making it ideally suited for use in broadband zero IF or lowIF-to-RF applications and in broadband digital predistortiontransmitters. The ADL5372 accepts two differential baseband inputs and asingle-ended, local oscillator (LO) and generates a single-endedoutput.The ADL5372 is fabricated using the Analog Devices, Inc.,advanced silicon-germanium bipolar process. It is available ina 24-lead, exposed-paddle, RoHS compliant, LFCSP. Performanceis specified over a −40°C to +85°C temperature range. A RoHScompliant evaluation board is available. Applications Cellular communication systems: CDMA2000/GSM/WCDMA WiMAX/broadband wireless access systems Satellite modems