The ADG901/ADG902 are wideband switches that use a complementary metal-oxide semiconductor (CMOS) process to provide high isolation and low insertion loss to 1 GHz. The ADG901 is an absorptive (matched) switch with 50 ? terminated shunt legs, while the ADG902 is a reflective switch. These devices are designed such that the isolation is high over the dc to 1 GHz frequency range. These switches enable the user to pass dc signals up to 0.5 V without the use of a dc blocking capacitor. They have on-board CMOS control logic, thus eliminating the need for external controlling circuitry. The control inputs are both CMOS and LVTTL compatible. The low power consumption of these CMOS devices makes them ideally suited to wireless applications and general-purpose high frequency switching.Product Highlights 40 dB Off Isolation at 1 GHz 0.8 dB Insertion Loss at 1 GHz 17 dBm P1dB at 1 GHzApplications Wireless communications General purpose RF switching Dual-band applications High speed filter selection Digital transceiver front-end switch IF switching Tuner modules Antenna diversity switching list

RF Amplifier lo Noise amp SMT, 350 - 550 MHz

0.25dB LSB 7-Bit Digital Attenuator SMT, 10 - 300 MHz Features: 0.25 dB LSB Steps to 31.75 dB Power-Up State Selection High Input IP3: +40 dBm TTL/CMOS Compatible, Serial Control Excellent State & Step Accuracy ±0.25 dB Single +5V Supply 16 Lead 3×3mm SMT Package: 9mm2

HMC5927LS6 - Amplifier Evaluation Board

Low Noise Amplifier Chip, 7.0 - 13.5 GHz Features: Noise Figure: 1.8 dB Gain: 17 dB OIP3: 24 dBm Single Supply: +3V @ 51 mA 50 Ohm Matched Input/Output Small Size: 1.96 x 0.98 x 0.10 mm

Phase Locked Loops - PLL 1000-2500MHz Frac-N PLL

GaAs InGaP HBT MMIC Ultra Low Phase Noise, Distributed Amplifier, 2 - 18 GHz Features: Ultra Low Phase Noise: -160 dBc/Hz @ 10 kHz P1dB Output Power: +15 dBm Gain: 14 dB Output IP3: +27 dBm Supply Voltage: +5V @ 64 mA 50 Ω Matched Input/Output Die Size: 2.80 x 1.73 x 0.1 mm

RF Amplifier IC General Purpose 4.8GHz ~ 6GHz 16-QFN (3x3)

4T2R Direct RF Transmitter and Observation Receiver Features: Flexible reconfigurable radio common platform design Transmit/receive channel bandwidth up to 1.2 GHz/2.4 GHz (4T2R) RFDAC/RFADC RF frequency range up to 7.5 GHz On-chip PLL with multichip synchronization External RFCLK input option Versatile digital features Configurable digital up/down conversion (DDC and DUC) 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs, 2 independent 48-bit NCO per DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Programmable delay and gain per transmit data path Coarse DDC delay adjust for DPD observation path Auxiliary features Power amplifier downstream protection circuitry On-chip temperature monitoring unit Programmable GPIO pins supporting different user configurations ADC clock driver with selectable divide ratios TDD power savings option and sharing ADCs SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes per each DAC and ADC JESD204B compatible with maximum 15.5 Gbps lane rate JESD204C compatible with maximum 24.75 Gbps lane rate Supports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

21.2 GHz to 23.6 GHz, Low Noise Amplifier Features: Frequency range: 21.2 GHz to 23.6 GHz Typical gain of >22.5 dB Low noise input Noise figure 3.3 dB typical at 21.2 GHz 3.4 dB typical at 23.6 GHz High linearity input ≥1.0 dBm typical input third-order intercept (IIP3) −8 dBm input 1 dB compression point (P1dB) at 23.6 GHz Matched 50 Ω single-ended input Matched 100 Ω differential outputs 8-lead, 2.00 mm × 2.00 mm LFCSP microwave packaging