The ADRF5043 is a nonreflective, SP4T switch manufactured in the silicon on insulator (SOI) process.The ADRF5043 operates from 9 kHz to 44 GHz with an insertion loss of lower than 2.5 dB and an isolation of higher than 36 dB. The device has a RF input power handling capability of 24 dBm for both through and terminated paths.The ADRF5043 requires a dual-supply voltage of +3.3 V and ?3.3 V. The device employs CMOS- and low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5043 has enable and logic select controls to feature all off state and port mirroring, respectively. The ADRF5043 is pin compatible with the ADRF5042 fast switching version, which operates from 100 MHz to 44 GHz.The ADRF5043 comes in a 24-terminal, 3 mm ? 3 mm, RoHS compliant, land grid array (LGA) package and can operate from ?40?C to +105?C.Applications Industrial Scanners Test instrumentation Cellular infrastructure?millimeterwave (mmWave) 5G Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF5044 is a general-purpose, single-pole, four-throw (SP4T) switch manufactured using a silicon process. It comes in a 24-terminal land grid array (LGA) package and provides high isolation and low insertion loss from 100 MHz to 30 GHz.This broadband switch requires dual-supply voltages, +3.3 V and ?3.3 V, and provides complementary metal-oxide semiconductor (CMOS)/low voltage transistor-transistor logic (LVTTL) logic-compatible control.Applications Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, and electronic counter measures (ECMs) Broadband telecommunications systems

The ADRF5549 is a dual-channel, integrated, RF front-end multichip module designed for time division duplexing (TDD) applications that operates from 1.8 GHz to 2.8 GHz. The ADRF5549 is configured in dual channels with a cascading, two-stage, low noise amplifier (LNA) and a high power, silicon single-pole, double-throw (SPDT) switch.In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure of 1.4 dB and a high gain of 35 dB with an output third-order intercept point (OIP3) of 32 dBm typical.In low gain mode, one stage of the two-stage LNA is in bypass mode providing 17 dB of gain at a lower current of 35 mA. In power-down mode, the LNAs are turned off, and the device draws 12 mA.In transmit operation, when RF inputs are connected to a termination pin (TERM-ChA or TERM-ChB), the switch provides a low insertion loss of 0.6 dB and handles a long-term evolution (LTE) full lifetime average (9 dB peak to average ratio (PAR)) of 40 dBm and 43 dBm for a 9 dB PAR LTE single event (ApplicationsWireless InfrastructureTDD massive multiple input and multiple output (MIMO) and active antenna systemsTDD-based communication systems

The ADRF5740 is a silicon, 4-bit digital attenuator with 22 dB attenuation control range in 2 dB steps.The ADRF5740 operates from 10 MHz to 60 GHz with less than 3.3 dB of insertion loss and with ?(0.2 + 7.0% of attenuation state) of attenuation accuracy at 55 GHz. The ATTIN port of the ADRF5740 has an RF input power handling capability of 24 dBm average and 24 dBm peak for all states.The ADRF5740 requires a dual supply voltage of +3.3 V and ?3.3 V. The ADRF5740 features parallel mode control, and CMOS- and low voltage transistor to transistor logic (LVTTL)-compatible controls.The ADRF5740 RF ports are designed to match a characteristic impedance of 50 ?. The ADRF5740 comes in a 16-terminal, 2.5 mm ? 2.5 mm, RoHS compliant, land grid array (LGA) package and operates from ?40?C to +105?C.Applications Industrial scanners Test and instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF6821 is a highly integrated, dual radio frequency (RF) input, zero intermediate frequency (IF)/low IF RFIC receiverwith a quadrature demodulator, digital step attenuator (DSA),IF linear amplifiers, an integrated, fractional-N phase-locked loop (PLL), and a low phase noise, multicore, voltage controlled oscillator (VCO). The RFIC is ideally suited for communication digital predistortion (DPD) systems.The high isolation 2:1 RF switch and on-chip wideband RFbalun enable the ADRF6821 to support two single-ended, 50 ? terminated RF inputs. A programmable attenuator ensures anoptimal differential RF input level to the high linearity demodulatorcore. The integrated attenuator offers an attenuation range of 15 dB with a step size of 1 dB. High linearity IF amplifiers follow the demodulator and provide an interface to the next componentin the chain, typically an analog-to-digital converter (ADC).The ADRF6821 offers two alternatives for generating thedifferential local oscillator (LO) input signal: internally viathe on-chip fractional-N synthesizer with low phase noiseVCOs or externally via a low phase noise LO signal. Theintegrated synthesizer enables continuous LO coverage from 450 MHz to 2800 MHz. The PLL reference input supports awide frequency range and includes integrated reference dividers before the phase frequency detector (PFD).When selected, the output of the internal fractional-N synthesizeris applied to a divide by 2, quadrature phase splitter. From theexternal LO path, a 2? LO signal can be used with the divide by 2,quadrature phase splitter to generate the quadrature LO inputs to the mixers.The ADRF6821 is fabricated using an advanced silicon germanium(SiGe), bipolar complementary metal oxide semiconductor(BiCMOS) process. It is available in a 56-lead, RoHS compliant,8 mm ? 8 mm LFCSP package with an exposed pad. Performanceis specified over the ?40?C to +105?C case temperature range.Applications Cellular W-CDMA/GSM/LTE DPD receivers? Microwave, point to point radios

RF Amplifier dig Variable-Gain

The ADRF5021 is a general-purpose single-pole, double-throw (SPDT) switch manufactured using a silicon process. It comes in a 3 mm ? 3 mm, 20-terminal land grid array (LGA) package and provides high isolation and low insertion loss from 9 kHz to 30 GHz.This broadband switch requires dual supply voltages, +3.3 V and ?2.5 V, and provides CMOS/LVTTL logic-compatible control.Applications Test instrumentation Microwave radios and very small aperture terminals (VSATs) Military radios, radars, electronic counter measures (ECMs) Broadband telecommunications systems

The EVAL-ADL5902-ARDZ shield illustrates the functionality of the ADL5902, a 50 MHz to 9 GHz 65 dB TruPwr™ RMS responding RF power detector. The voltage outputs of the ADL5902 are routed to the ANALOG IN connector of the Arduino base board. This allows the RF power detector’s output voltage to be easily digitized and processed by the Arduino base board’s integrated six-channel ADC. The output of the ADL5902’s on-board temperature sensor is also routed to one of the ANALOG IN pins.

The LTC5532 is an RF power detector for RF applications operating in the 300MHz to 7GHz range. A temperature compensated Schottky diode peak detector and buffer amplifier are combined in a small ThinSOT? or (2mm x 2mm) DFN package. The supply voltage range is optimized for operation from a single lithium-ion cell or 3x NiMH.The RF input voltage is peak detected using an on-chip Schottky diode. The detected voltage is buffered and supplied to the VOUT pin.The LTC5532 output buffer gain is set via external resistors. The initial starting voltage of 120mV ?35mV can be precisely adjusted using the VOS pin.The LTC5532 operates with RF input power levels from ?32dBm to 10dBmApplications 802.11a, 802.11b, 802.11g, 802.15 Multimode Mobile Phone Products Optical Data Links Wireless Data Modems Wireless and Cable Infrastructure RF Power Alarm Envelope Detector

The LT5528 is a direct I/Q modulator designed for high performance wireless applications, including wireless infrastructure. It allows direct modulation of an RF signal using differential baseband I and Q signals. It supports PHS, GSM, EDGE, TD-SCDMA, CDMA, CDMA2000, W-CDMA and other systems. It may also be con? gured as an image reject up-converting mixer, by applying 90? phase-shifted signals to the I and Q inputs. The I/Q baseband inputs consist of voltage-to-current converters that in turn drive double-balanced mixers. The outputs of these mixers are summed and applied to an on-chip RF transformer, which converts the differential mixer signals to a 50? single-ended output. The four balanced I and Q baseband input ports are intended for DC coupling from a? source with a common-mode voltage level of about 0.5V. The LO path consists of an LO buffer with single-ended input, and precision quadrature generators that produce the LO drive for the mixers. The supply voltage range is 4.5V to 5.25V.Applications Infrastructure Tx for DCS, PCS and UMTS Bands Image Reject Up-Converters for PCS and UMTS Bands Low-Noise Variable Phase-Shifter for 1.5GHz to 2.4GHz Local Oscillator Signals