18 GHz to 44 GHz, GaAs, pHEMT, 32 dBm (>1 W), MMIC Power Amplifier Features:ADPA7005AEHZ Output P1dB: up to 31 dBm typical PSAT: up to 32 dBm typical Gain: up to 15.5 dB typical Output IP3: up to 42.5 dBm typical Supply voltage: 5 V at 1400 mA 50 matched input/output 18-terminal, 7 mm × 7 mm LCC_HS package Integrated power detectorADPA7005CHIP Output P1dB: 31 dBm typical at 20 GHz to 34 GHz PSAT: 32 dBm typical at 20 GHz to 34 GHz Gain: 17 dB typical at 20 GHz to 34 GHz Output IP3: 41 dBm typical at 20 GHz to 34 GHz Supply voltage: 5 V at 1200 mA maximum 50 Ω matched input/output Die size: 3.75 mm × 3.47 mm × 0.1 mm

18 GHz to 44 GHz, GaAs, pHEMT, MMIC, 1/2 W Power Amplifier Features: Output P1dB: 29 dBm PSAT: 29.5 dBm Gain: 23.5 dB Output IP3: 38 dBm Supply voltage: 5 V at 800 mA Integrated power detector 50 Ω matched input/output Die size: 2.750 mm × 1.805 mm × 0.102 mm

4T2R Direct RF Transmitter and Observation Receiver Features: Flexible reconfigurable radio common platform design Transmit/receive channel bandwidth up to 1.2 GHz/2.4 GHz (4T2R) RFDAC/RFADC RF frequency range up to 7.5 GHz On-chip PLL with multichip synchronization External RFCLK input option Versatile digital features Configurable digital up/down conversion (DDC and DUC) 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs, 2 independent 48-bit NCO per DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Programmable delay and gain per transmit data path Coarse DDC delay adjust for DPD observation path Auxiliary features Power amplifier downstream protection circuitry On-chip temperature monitoring unit Programmable GPIO pins supporting different user configurations ADC clock driver with selectable divide ratios TDD power savings option and sharing ADCs SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes per each DAC and ADC JESD204B compatible with maximum 15.5 Gbps lane rate JESD204C compatible with maximum 24.75 Gbps lane rate Supports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

Sub-GHz Modules x2 Active mult Module, 6 - 10 GHz Fout

Attenuators Fixed, 20 mil TL, DC-50GHz

RF Mixer DBL-BAL mix SMT 9 - 15 GHz

The HMC833LP6GE is a low noise, wide band, Fractional-N Phase-Locked-Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO) with a fundamental frequency of 1500 MHz - 3000 MHz, and an integrated VCO Output Divider (divide by 1/2/4/6.../60/62) and doubler, that together allow the HMC833LP6GE to generate frequencies from 25 MHz to 6000 MHz. The integrated Phase Detector (PD) and delta-sigma modulator, capable of operating at up to 100 MHz, permit wider loop-bandwidths with excellent spectral performance.The HMC833LP6GE features industry leading phase noise and spurious performance, across all frequencies, that enable it to minimize blocker effects, and improve receiver sensitivity and transmitter spectral purity. The superior noise floor (< -170 dBc/Hz) makes the HMC833LP6GE an ideal source for a variety of applications - such as; LO for RF mixers, a clock source for high-frequency data-converters, or a tunable reference source for ultra-low spurious applications.Additional features of the HMC833LP6GE include RF output power control from 0 to 9 dB (3 dB steps), output Mute function, and a delta-sigma modulator Exact Frequency Mode which enables users to generate output frequencies with 0 Hz frequency error.Applications Cellular Infrastructure Microwave Radio WiMax, WiFi Communications Test Equipment CATV Equipment DDS Replacement Military Tunable Reference Source for Spurious- Free Performance

The HMC1040LP3CE is a self-biased GaAs MMIC Low Noise Amplifier housed in a leadless 3x3 mm plastic surface mount package. The amplifier operates between 24 and 43.5 GHz, delivering 23 dB of small signal gain, 2.2 dB noise figure, and output IP3 of +22 dBm, while requiring only 70 mA from a +2.5 V supply. The P1dB output power of +12 dBm enables the LNA to function as a LO driver for many of Hittite’s balanced, I/Q and image reject mixers. The HMC1040LP 3CE features I/Os that are DC blocked and internally matched to 50 Ohms, and is ideal for high capacity microwave radios and VSAT applications.Applications Point-to-Point Radios Test Instrumentation SatCom Transponders & VSAT Industrial Sensors EW & ECM Subsystems

The HMC1127 is a GaAs pHEMT MMIC Distributed Power Amplifier which operates between 2 and 50 GHz. The amplifier provides 14.5 dB of gain, 23 dBm output IP3 and 12.5 dBm of output power at 1 dB gain compression while requiring 80 mA from a +5V supply. The HMC1127 amplifier I/Os are internally matched to 50 Ω facilitating integration into Multi-Chip-Modules (MCMs). All data is taken with the chip connected via two 0.025 mm (1 mil) wire bonds of minimal length 0.31 mm (12 mils).APPLICATIONS Test Instrumentation Microwave Radio & VSAT Military & Space Telecom Infrastructure Fiber Optics

The HMC410AMS8G(E) is a passive double balanced high IP3 mixer that operates between 9 and 15 GHz. The HMC410AMS8G(E) operates with LO drive levels between +13 dBm and +19 dBm, and provide 8 dB conversion loss across the entire specified frequency band. These mixers require no external components or bias.The HMC410AMS8G(E) is a replacement for the HMC410MS8G(E)Applications Long Haul Radio Platforms Microwave Radio VSAT