4MSPS Dual Simultaneous Sampling, 16-BIT SAR ADC, Differential Input Features: 16-bit/14-bit ADC family Dual simultaneous sampling Fully differential analog inputs 4 MSPS throughput conversion rate SNR (typical) 92.5 dB, VREF = 3.3 V external at AD7380 (16-bit) 85.4 dB, VREF = 3.3 V external at AD7381 (14-bit) 101 dB with ×16 OSR On-chip oversampling function Resolution boost function INL (maximum) 2.0 LSBs at 16-bit 1.0 LSB at 14-bit 2.5 V internal reference High speed serial interface −40°C to +125°C operation 16-lead LFCSP, 3 mm × 3 mm Wide common-mode range Alert function

+3/+5 Volt Serial-Input Micropower 12-Bit DAC Features: Micropower - 100 µA Single Supply - 2.7 V to 5.5 V Operation Compact 1.75 mm Height SO-8 Package and 1.1 mm Height TSSOP-8 Package AD7390 - 12-Bit Resolution AD7391 - 10-Bit Resolution SPI and QSPI Serial Interface Compatible with Schmitt Trigger Inputs

16-Channel, 1 MSPS, 12-Bit ADC with Sequencer Features: Fast throughput rate: 1 MSPS Specified for VDD of 2.7 V to 5.25 V Low power at maximum throughput rates 5.4 mW maximum at 870 kSPS with 3 V supplies 12.5 mW maximum at 1 MSPS with 5 V supplies 16 (single-ended) inputs with sequencer Wide input bandwidth: 69.5 dB SNR at 50 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface, SPI/QSPI™/MICROWIRE™/ DSP compatible Full shutdown mode: 0.5 μA maximum 28-lead TSSOP and 32-lead LFCSP packages AEC-Q100 qualified for automotive applicationsAD7490-EP supports defense and aerospace applications (AQEC standard) Download AD7490-EP Data Sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/12635 DSCC Drawing Number

8-Channel DAS with 16-Bit, Bipolar Input, Simultaneous Sampling ADC Features: 8/6/4 simultaneously sampled inputs True bipolar analog input ranges: ±10 V, ±5 V Pin to pin compatible with the state-of-the-art AD7606B Single 5 V analog supply and 2.3 V to 5 V VDRIVE Fully integrated data acquisition solution Analog input clamp protection Input buffer with 1 MΩ analog input impedance Second-order antialiasing analog filter On-chip accurate reference and reference buffer 16-bit ADC with 200 kSPS on all channels Oversampling capability with digital filter Flexible parallel/serial interface SPI/QSPI™/MICROWIRE™/DSP compatible Performance 7 kV ESD rating on analog input channels 95.5 dB SNR, −107 dB THD ±0.5 LSB INL, ±0.5 LSB DNL Low power: 100 mW Standby mode: 25 mW Temperature range: −40°C to +85°C 64-lead LQFP packageAD7606-EP supports defense and aerospace applications (AQEC standard) Download AD7606-EP data sheet (pdf) Military temperature range −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Product change notification Qualification data available on request V62/18611

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC Features:Flexible reconfigurable common platform design 4 DACs and 2 ADCs (4D2A) and 2D2A options Supports single, dual, and quad band Datapaths and DSP blocks are fully bypassableDAC to ADC sample rate ratios of 1, 2, 3, and 4 On-chip PLL with multichip synchronization External RFCLK input option for off-chip PLL Maximum DAC sample rate up to 12 GSPS Maximum data rate up to 12 GSPS using JESD204C Useable analog bandwidth to 8 GHz Maximum ADC sample rate up to 6 GSPS Maximum data rate up to 6 GSPS using JESD204C Useable analog bandwidth to 8 GHz ADC ac performance at 6 GSPS, input at 2.7 GHz, 1 dBFS Full-scale input voltage: 1.475 V p-p Noise density: 147.5 dBFS/Hz Noise figure: 25.3 dB HD2: 72 dBFS HD3: 68 dBFS Worst other (excluding HD2 and HD3): 78 dBFS DAC ac performance at 12 GSPS, output at 2.6 GHz Full-scale output current range: 6.43 mA to 37.75 mA Two-tone IMD3 (6 dBFS per tone): 72 dBc NSD, single-tone: 160 dBc/Hz SFDR, single-tone: 75 dBc Versatile digital features Selectable interpolation and decimation filters Configurable DDC and DUC 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs 48-bit NCO per DUC or DDC Option to bypass fine and coarse DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Programable delay per data path Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Fine DUC channel gain control and delay adjust Coarse DDC delay adjust for DPD observation path Auxiliary features Fast frequency hopping Direct digital synthesis (DDS) Low latency loopback modes (receive datapath data can be routed to the transmit datapaths) ADC clock driver with selectable divide ratios Power amplifier downstream protection circuitry On-chip temperature monitoring unit Flexible GPIO pins TDD power savings option SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes JESD204B/C transmitter (JT×) and 8 lanes JESD204B/C receiver (JR×) JESD204B compliance with the maximum 15.5 Gbps JESD204C compliance with the maximum 24.75 Gbps Supports real or complex digital data (8-, 12-, 16-, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

GaAs, pHEMT, MMIC, 1 W, Power Amplifier with Power Detector, 37 GHz to 40 GHz Features: 32 dBm typical saturated output power (PSAT) at 18% power added efficiency (PAE) at 39 GHz P1dB compression output power: 31.5 dBm typical High output third-order intercept (IP3): 40 dBm typical High gain: 24 dB typical 50 Ω matched input/output Ceramic, 6 mm × 6 mm, high frequency, air cavity package

26 GHz, T Flip-Flop w/Reset Features: Supports Clock Frequencies up to 26 GHz Differential & Singe-Ended Operation Fast Rise and Fall Times: 18/17 ps Low Power Consumption: 270 mW typ. Propagation Delay: 95 ps Single Supply: -3.3V 16 Lead Ceramic 3×3mm SMT Package: 9mm2

Wideband VCO SMT w/Buffer Amplifier SMT, 6 - 12 GHz Features: Wide Tuning Bandwidth Pout: +1 dBm Low SSB Phase Noise: -95 dBc/Hz @100 kHz No External Resonator Needed Single Positive Supply: +5V @ 57 mA 24 Lead 4x4mm SMT Package: 16mm2

9 GHz to 12 GHz, GaAs, MMIC, I/Q Downconverter Features: Conversion gain: 11 dB (typical) at IFOUT = 100 MHz Image rejection: 25 dB (typical) at IFOUT = 100 MHz LO to RF isolation: 46 dB (typical) LO to IF isolation: 26 dB (typical) IF output frequency: dc to 3.5 GHz 32-lead, 4.9 mm × 4.9 mm ceramic leadless chip carrier

5.6 GHz to 8.6 GHz, GaAs, MMIC, I/Q Downconverter Features: Conversion gain: 13 dB typical Image rejection: 32 dBc typical Input P1dB compression: −6 dBm typical Input IP3: 3 dBm typical, 6.0 GHz to 8.6 GHz Noise figure: 2 dB typical LO to RF isolation: 48 dBm typical LO to IF isolation: 13 dBm typical RF to IF isolation: 10 dBm typical Amplitude balance: 0.2 dB typical Phase balance: −2° typical RF return loss: 10 dB typical LO return loss: 15 dB typical IF return loss: 15 dB typical Exposed paddle, 4 mm × 4 mm, 24-lead, LFCSP