Silicon SPDT Switch, Reflective, 9 kHz to 44 GHz Features: Ultrawideband frequency range: 9 kHz to 44 GHz Reflective design Low insertion loss with impedance match 0.9 dB typical to 18 GHz 1.4 dB typical to 40 GHz 1.6 dB typical to 44 GHz Low insertion loss without impedance match 0.9 dB typical to 18 GHz 1.7 dB typical to 40 GHz 2.2 dB typical to 44 GHz High input linearity P1dB: 27.5 dBm typical IP3: 50 dBm typical High RF input power handling Through path: 27 dBm Hot switching: 27 dBm No low frequency spurious RF settling time (50% VCTL to 0.1 dB final RF output): 3.4 μs 12-terminal, 2.25 mm × 2.25 mm LGA package Pin compatible with the ADRF5024 fast switching version

Silicon SPDT Switch, Reflective, 9 kHz to 44 GHz Features: Ultrawideband frequency range: 9 kHz to 44 GHz Reflective design Low insertion loss with impedance match 0.9 dB typical to 18 GHz 1.4 dB typical to 40 GHz 1.6 dB typical to 44 GHz Low insertion loss without impedance match 0.9 dB typical to 18 GHz 1.7 dB typical to 40 GHz 2.2 dB typical to 44 GHz High input linearity P1dB: 27.5 dBm typical IP3: 50 dBm typical High RF input power handling Through path: 27 dBm Hot switching: 27 dBm No low frequency spurious RF settling time (50% VCTL to 0.1 dB final RF output): 3.4 μs 12-terminal, 2.25 mm × 2.25 mm LGA package Pin compatible with the ADRF5024 fast switching version

Silicon SPDT Switch, Nonreflective, 100 MHz to 44 GHz Features: Ultrawideband frequency range: 100 MHz to 44 GHz Nonreflective design Low insertion loss: 1.2 dB to 18 GHz 1.7 dB to 26 GHz 2.4 dB to 40 GHz 3.8 dB to 44 GHz High isolation 55 dB to 18 GHz 53 dB to 26 GHz 50 dB to 40 GHz 45 dB to 44 GHz High input linearity P1dB: 27 dBm typical IP3: 53 dBm typical High power handling 24 dBm insertion loss path 24 dBm isolation path All off state control No low frequency spurious signals 0.1 dB RF settling time: 40 ns typical 20-terminal, 3 mm × 3 mm LGA package Pin compatible with ADRF5027, low frequency cutoff versionADRF5026-EP supports defense and aerospace applications (AQEC standard) Download ADRF5026-EP data sheet (pdf) Supports defense and aerospace applications (AQEC standard) Military temperature range (−55°C to +105°C) Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available on request V62/21601 DSCC Drawing Number

Silicon SPDT Switch, Nonreflective, 100 MHz to 44 GHz Features: Ultrawideband frequency range: 100 MHz to 44 GHz Nonreflective design Low insertion loss: 1.2 dB to 18 GHz 1.7 dB to 26 GHz 2.4 dB to 40 GHz 3.8 dB to 44 GHz High isolation 55 dB to 18 GHz 53 dB to 26 GHz 50 dB to 40 GHz 45 dB to 44 GHz High input linearity P1dB: 27 dBm typical IP3: 53 dBm typical High power handling 24 dBm insertion loss path 24 dBm isolation path All off state control No low frequency spurious signals 0.1 dB RF settling time: 40 ns typical 20-terminal, 3 mm × 3 mm LGA package Pin compatible with ADRF5027, low frequency cutoff versionADRF5026-EP supports defense and aerospace applications (AQEC standard) Download ADRF5026-EP data sheet (pdf) Supports defense and aerospace applications (AQEC standard) Military temperature range (−55°C to +105°C) Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available on request V62/21601 DSCC Drawing Number

Nonreflective, 9 kHz to 44 GHz Silicon SP4T Switch Features: Ultrawideband frequency range: 9 kHz to 44 GHz Nonreflective 50 Ω design Low insertion loss: 1.5 dB at 18 GHz 2.4 dB at 40 GHz 2.5 dB at 44 GHz High isolation: 44 dB at 18 GHz 39 dB at 40 GHz 36 dB at 44 GHz High input linearity: P0.1dB: 26 dBm typical IP3: 48 dBm typical High power handling 24 dBm through path 24 dBm terminated path All off state control Logic select control No low frequency spurs Settling time (0.1 dB final RF output): 6 μs 24-terminal, 3 mm × 3 mm LGA package Pin compatible with ADRF5042, fast switching version

Silicon SPDT Switch, Reflective, 35 GHz to 44 GHz Features:Reflective design Low insertion loss: 1.8 dB at 44 GHz High isolation: 28 dB at 44 GHz High input linearity 0.1 dB power compression (P0.1dB): 37 dBm Third-order intercept (IP3): 52 dBm High RF power handling: 28 dBm average 36 dBm peak Single supply operation: 3.3V Internal negative voltage generator (NVG) RF settling time (0.1 dB final RF output): 45 ns 20-terminal, 3 mm × 3 mm, land grid array package Pin compatible with the ADRF5300: 24 GHz - 32 GHz

Dual-Channel, 3.7 GHz to 5.3 GHz, Receiver Front End Features: Integrated dual-channel RF front end 2-stage LNA and high power SPDT switch On-chip bias and matching Single supply operation Gain High gain mode: 33 dB typical at 4.6 GHz Low gain mode: 18 dB typical at 4.6 GHz Low noise figure High gain mode: 1.6 dB typical at 4.6 GHz Low gain mode: 1.6 dB typical at 4.6 GHz High channel to channel isolation  Between RxOUT-ChA and RxOUT-ChB: 45 dB typical Between TERM-ChA and TERM-ChB: 53 dB typical  Low insertion loss: 0.5 dB typical at 4.6 GHz High power handling at TCASE = 105°C Full lifetime LTE average power (9 dB PAR): 40 dBm Single event (<10 sec operation) LTE average power (9 dB PAR): 43 dBm High OIP3: 31 dBm typical Power-down mode and low gain mode for LNA Low supply current High gain mode: 86 mA typical at 5 V Low gain mode: 36 mA typical at 5 V Power-down mode: 12 mA typical at 5 V Positive logic control 40-lead, 6 mm × 6 mm LFCSP 

0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Features:Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match 2.1 dB up to 18 GHz 2.9 dB up to 26 GHz 4.8 dB up to 40 GHz Attenuation accuracy with impedance match ±(0.10 + 1.0% of attenuation state) up to 18 GHz ±(0.15 + 0.8% of attenuation state) up to 26 GHz ±(0.35 + 2.5% of attenuation state) up to 40 GHz Typical step error with impedance match ±0.18 dB up to 18 GHz ±0.23 dB up to 26 GHz ±0.51 dB up to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 27 dBm IP3: 50 dBm typical High RF input power handling: 27 dBm average, 30 dBm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF settling time (0.1 dB of final RF output): 250 ns 24-terminal, 4 mm × 4 mm LGA package Pin compatible with ADRF5720, low frequency cutoff version

2 dB LSB, 4-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Features: Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 2 dB steps to 30 dB Low insertion loss 1.7 dB to 18 GHz 2.2 dB to 26 GHz 3.5 dB to 40 GHz Attenuation accuracy ±(0.1 + 2.0%) of attenuation state up to 18 GHz ±(0.2 + 2.5%) of attenuation state up to 26 GHz ±(0.5 + 10.0%) of attenuation state up to 40 GHz High RF input power handling: 26 dBm average, 30 dBm peak Tight distribution in relative phase Typical step error ±0.15 dB to 18 GHz ±0.20 dB to 26 GHz ±0.60 dB to 40 GHz High input linearity P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 26 dBm IP3: 50 dBm typical No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF amplitude settling time (0.1 dB of final RF output): 230 ns 2.5 mm × 2.5 mm, 16-terminal LGA package Pin compatible with ADRF5721, low frequency cutoff version

15.1 GHz to 32 GHz, Tunable Band-Pass Filter Features:Amplitude settling time: 200 ns typicalWideband rejection: 30 dBSingle chip implementation40-lead, 6 mm 6 mm, RoHS compliant LFCSP