155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp Features: Meets SONET requirements for jitter transfer/generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including15/14 (7%) wrapper rate Choice of 19.44 MHz, 38.88 MHz, 77.76 MHz, or 155.52 MHz REFCLK REFCLK inputs: LVPECL/LVDS/LVCMOS/LVTTL compatible (LVPECL/LVDS only at 155.52 MHz) Optional 19.44 MHz on-chip oscillator to be used with external crystal Loss-of-lock indicator Loopback mode for high speed test data Output squelch and bypass features Single-supply operation: 3.3 V Low power: 540 mW typical 7 mm × 7 mm, 48-lead LFCSP

5.7 kV RMS/1.5 kV RMS, Quad-Channel LVDS 2.5 Gigabit Isolator (0 Reverse Channels) Features: 5.7 kV rms and 1.5 kV rms LVDS isolators Complies with TIA/EIA-644-A LVDS signal levels Quad-channel configuration Any data rate up to 2.5 Gbps switching with low jitter 10 Gbps total bandwidth across four channels 2.15 ns typical propagation delay Typical jitter: 0.82 ps rms random, 40 ps total peak Lower power 1.8 V supplies ±8 kV IEC 61000-4-2 ESD protection across isolation barrier High common-mode transient immunity: 100 kV/μs typical Safety and regulatory approvals (28-lead SOIC_W_FP package) UL (pending): 5700 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A (pending) VDE certificate of conformity (pending) DIN V VDE V 0884-11 (VDE V 0884-11):2017-01 VIORM = 849 VPEAK (working voltage) Enable or disable refresh (low speed output correctness check) Operating temperature range: −40°C to +125°C 28-lead, wide-body, finer pitch SOIC_W_FP package with 8.3 mm creepage and clearance or 6 mm × 6 mm LFCSP package with 1.27 mm creepage and clearance

5 kV RMS/3.75 kV RMS, Dual LVDS Gigabit Isolator (0 Reverse Channels) Features: 5 kV rms and 3.75 kV rms LVDS isolators Complies with TIA/EIA-644-A LVDS standard Multiple dual-channel configurations Any data rate up to 1.1 Gbps switching with low jitter 4 ns typical propagation delay 2.6 ps rms typical random jitter, rms 90 ps typical peak-to-peak total jitter at 1.1 Gbps 2.5 V or 3.3 V supplies −75 dBc power supply ripple rejection, phase spur level Glitch immunity ±8 kV IEC 61000-4-2 ESD protection across isolation barrier High common-mode transient immunity: >25 kV/μs Passes EN 55022 Class B radiated emissions limits with 1.1 Gbps PRBS Safety and regulatory approvals (20-lead SOIC_W package) UL (pending): 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A (pending) VDE certificate of conformity (pending) DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 424 VPEAK Fail-safe output high for open, short, and terminated input conditions (ADN4655/ADN4656) Operating temperature range: −40°C to +125°C 7.8 mm minimum creepage and clearance

5 kV RMS/3.75 kV RMS, Dual LVDS Gigabit Isolator (Second Channel Reversed) Features: 5 kV rms and 3.75 kV rms LVDS isolators Complies with TIA/EIA-644-A LVDS standard Multiple dual-channel configurations Any data rate up to 1.1 Gbps switching with low jitter 4 ns typical propagation delay 2.6 ps rms typical random jitter, rms 90 ps typical peak-to-peak total jitter at 1.1 Gbps 2.5 V or 3.3 V supplies −75 dBc power supply ripple rejection, phase spur level Glitch immunity ±8 kV IEC 61000-4-2 ESD protection across isolation barrier High common-mode transient immunity: >25 kV/μs Passes EN 55022 Class B radiated emissions limits with 1.1 Gbps PRBS Safety and regulatory approvals (20-lead SOIC_W package) UL (pending): 5000 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A (pending) VDE certificate of conformity (pending) DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 424 VPEAK Fail-safe output high for open, short, and terminated input conditions (ADN4655/ADN4656) Operating temperature range: −40°C to +125°C 7.8 mm minimum creepage and clearance

Dual, 3 V, CMOS, LVDS High Speed Differential Driver Features:15 kV ESD protection on output pins600 Mbps (300 MHz) switching ratesFlow-through pinout simplifies PCB layout300 ps typical differential skew700 ps maximum differential skew1.5 ns maximum propagation delay3.3 V power supply355 mV differential signalingLow power dissipation: 23 mW typicalInteroperable with existing 5 V LVDS receiversConforms to TIA/EIA-644 LVDS standardIndustrial operating temperature range (40C to +85C)

250 Mbps, Half Duplex, Quad M-LVDS Transceivers Features: Four M-LVDS transceivers (driver and receiver pairs) Switching rate: 250 Mbps (125 MHz) Independent pin select for each receiver, two modes: Type 1: input hysteresis of 15 mV typical Type 2: differential input threshold voltage offset by 100 mV to support open-circuit, short-circuit, and bus idle fail-safe Compatible with the TIA/EIA-899 standard for M-LVDS Glitch free power-up/power-down on the M-LVDS bus Controlled transition times on the driver output Common-mode range: −1 V to +3.4 V, allowing communication with ±2 V of ground noise Driver outputs high-Z when disabled or powered off Independent enable pins for each driver and receiver Enhanced ESD protection on bus pins ≥±15 kV HBM, air discharge ≥±8 kV HBM, contact discharge ≥±10 kV IEC 61000-4-2, air discharge ≥±8 kV IEC 61000-4-2, contact discharge Enhanced ±8 kV HBM ESD protection for all pins, contact discharge Operating temperature range: −40°C to +105°C Available in 48-lead, 7 mm x 7 mm LFCSP

12-Bit High Output Current Source Features: High precision 12-bit current source Low noise Long term stability Current output from 0 mA to 300 mA Output fault indication Low drift Programmable maximum current 24-lead 4 mm × 4 mm lead frame chip scale package 3-wire serial interface

Ultracompact 1.5 A Thermoelectric Cooler (TEC) Controller Features: Patented high efficiency single inductor architecture Integrated low RDSON MOSFETs for the TEC controller TEC voltage and current operation monitoring No external sense resistor required Independent TEC heating and cooling current limits settings Programmable maximum TEC voltage 2.0 MHz PWM driver switching frequency External synchronization Two integrated zero drift, rail-to-rail chopper amplifiers Capable of NTC or RTD thermal sensors 2.50 V reference output with 1% accuracy Temperature lock indicator Available in a 25-ball, 2.5 mm × 2.5 mm WLCSP or in a 24-lead, 4 mm × 4 mm LFCSP AEC-Q100 qualified for automotive applications

Three-Channel, Isolated Micropower Management Unit with Seven Digital Isolators Features: Wide input supply voltage range: 4.5 V to 60 V Integrated flyback power switch Generates isolated, independent bipolar outputs and factory programmable buck output VOUT1: 21 V, 24 V or 6 V to 28 V VOUT2: 5.15 V, 5.0 V, or 3.3 V VOUT3: −24 V to −5 V Uses a 1:1 ratio transformer for simplified transformer design Peak current limiting and OVP for flyback, buck, and inverting regulators Precision enable input and power-good output Adjustable switching frequency via SYNC input Internal compensation and soft start control per regulator High speed, low propagation delay, SPI signal isolation channels Three, 100 kbps general-purpose isolated data channels 9 mm × 7 mm LFCSP form factor enables small overall solution size −40°C to +125°C operating junction temperature range Conforms to CISPR11 Class B radiated emission limits Safety and regulatory approvals (pending) UL recognition: 2500 V rms for 1 minute per UL 1577 CSA Component Acceptance Notice 5A 300 V rms basic insulation between slave, master, and field power domains (IEC 61010-1, pending) VDE certificate of conformity DIN V VDE 0884-10 (VDE 0884-10):2006-12 VIORM = 565 VPEAK

Two-Channel, Isolated Micropower Management Unit with Seven Digital Isolators Features: Wide input supply voltage range: 4.5 V to 60 V Integrated flyback power switch Generates two isolated, well regulated independent outputs VOUT1: 24 V or 6 V to 28 V VOUT2: 3.3 V, 5.0 V, or 5.15 V Uses a 1:1 ratio transformer for simplified transformer design Peak current limiting and OVP for flyback and buck regulators Precision enable input and power-good output Adjustable switching frequency via SYNC input Internal compensation and soft start control per regulator High speed, low propagation delay, SPI signal isolation channels Three 100 kbps general-purpose isolated data channels 41-lead, 9 mm × 7 mm LFCSP form factor enables small overall solution size −40°C to +125°C operating junction temperature range Safety and regulatory approvals (pending) CISPR11 Class B radiated emission UL recognition: 2500 V rms for 1 minute duration per UL 1577 CSA Component Acceptance Notice 5A 300 V rms basic insulation between slave, master, and field power domains (IEC 61010-1, pending) VDE certificate of conformity DIN V VDE 0884-10 (VDE 0884-10):2006-12 VIORM = 565 VPEAK