8-Channel DAS with 16-Bit, Bipolar Input, Simultaneous Sampling ADC Features: 8/6/4 simultaneously sampled inputs True bipolar analog input ranges: ±10 V, ±5 V Pin to pin compatible with the state-of-the-art AD7606B Single 5 V analog supply and 2.3 V to 5 V VDRIVE Fully integrated data acquisition solution Analog input clamp protection Input buffer with 1 MΩ analog input impedance Second-order antialiasing analog filter On-chip accurate reference and reference buffer 16-bit ADC with 200 kSPS on all channels Oversampling capability with digital filter Flexible parallel/serial interface SPI/QSPI™/MICROWIRE™/DSP compatible Performance 7 kV ESD rating on analog input channels 95.5 dB SNR, −107 dB THD ±0.5 LSB INL, ±0.5 LSB DNL Low power: 100 mW Standby mode: 25 mW Temperature range: −40°C to +85°C 64-lead LQFP packageAD7606-EP supports defense and aerospace applications (AQEC standard) Download AD7606-EP data sheet (pdf) Military temperature range −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Product change notification Qualification data available on request V62/18611

16-Bit, 100 kSPS PulSAR, Differential ADC in MSOP Features: 16-bit resolution with no missing codes Throughput: 100 kSPS INL: ±1 LSB typical, ±3 LSB maximum True differential analog input range: ±VREF 0 V to VREF with VREF up to VDD on both inputs Single-supply operation: 2.7 V to 5.5 V Standby current: 1 nA Serial interface SPI®-/QSPI-™/MICROWIRE-™/DSP-compatible Power dissipation  4 mW @ 5 V  1.5 mW @ 2.7 V  150 μW @ 2.7 V/10 kSPS 8-lead MSOP package

24-bit, 2 Channel Capacitance to Digital Converter Features:New standard in single chip solutions Interfaces to single or differential floating sensors Resolution down to 4 aF (that is, up to 21 ENOB) Accuracy: 4 fF Linearity: 0.01% Common-mode (not changing) capacitance up to 17 pF Full-scale (changing) capacitance range: 4 pF Tolerant of parasitic capacitance to ground up to 60 pF Update rate: 10 Hz to 90 Hz Simultaneous 50 Hz and 60 Hz rejection at 16 Hz Temperature sensor on-chip Resolution: 0.1C, accuracy: 2C Voltage input channel Internal clock oscillator 2-wire serial interface (I2C-compatible) Power 2.7 V to 5.25 V single-supply operation 0.7 mA current consumption Operating temperature: 40C to +125C 16-lead TSSOP package

14-Bit, 250 kSPS PulSAR, Pseudo Differential ADC in MSOP/LFCSP Features: 14-bit resolution with no missing codes Throughput: 250 kSPS INL: ±0.4 LSB typical, ±1 LSB maximum (±0.0061% of FSR) SINAD: 85 dB @ 20 kHz THD: −100 dB @ 20 kHz Pseudo differential analog input range 0 V to VREF with VREF up to VDD No pipeline delay See Data Sheet for Additional Information

16-Bit, 15 MSPS, Module Data Acquisition Solution Features: Integrated fully differential ADC driver with signal scaling Wide input common range High common-mode rejection Single-ended to differential conversion 2.048 V input range with 4.096 V REFBUF Critical passive components 0.005% precision matched resistor array for FDA 9 mm × 9 mm, 0.8 mm pitch, 100-ball BGA package 4× footprint reduction versus discrete solution Low power, dynamic power scaling, power-down mode 143 mW typical at 15 MSPS Throughput: 15 MSPS, no pipeline delay INL: 0.4 LSB typical, 1 LSB maximum SINAD: 89 dB typical at 1 kHz THD: 115 dB at 1 kHz, 106 dB at 400 kHz Gain error: 0.005% FS typical Gain error drift: 1 ppm/C maximum On-board reference buffer with VCMO generation Serial LVDS interface Wide operating temperature range: 40C to +85C

18-Bit, 15 MSPS, Module Data Acquisition Solution Features: Integrated fully differential ADC driver with signal scaling Wide input common-mode voltage range High common-mode rejection Single-ended to differential conversion Pin selectable input range with overrange Input ranges with 4.096 V REFBUF: ±10 V, ±5 V, ±4.096 V, ±2.5 V, and ±1.5 V Gain/attenuation options: 0.37, 0.73, 0.87, 1.38, and 2.25 Critical passive components 0.005% precision matched resistor array for FDA 9 mm × 9 mm, 0.8 mm pitch, 100-ball CSP_BGA package 2.5× footprint reduction vs. discrete solution Low power, dynamic power scaling, power-down mode 143 mW typical at 15 MSPS Throughput: 15 MSPS, no pipeline delay INL error: ±3.1 ppm typical, ±6.2 ppm maximum (Gain = 0.73, gain = 0.87, gain = 1.38, gain = 2.25) SINAD: 90.4 dB typical at 20 kHz (gain = 0.73) THD: −117 dB at 1 kHz, −110 dB at 100 kHz (gain = 0.73) Gain error: ±0.005%FS typical Gain error drift: ±0.13 ppm/°C typical On-board reference buffer with VCMO generation Serial LVDS interface Wide operating temperature range: −40°C to +85°C

Ultrafast SiGe Voltage Comparator (Featuring Reduced Swing PECL Output Drivers) Features: 180 ps propagation delay 25 ps overdrive and slew rate dispersion 8 GHz equivalent input rise time bandwidth 100 ps minimum pulse width 37 ps typical output rise/fall 10 ps deterministic jitter (DJ) 200 fs random jitter (RJ) −2 V to +3 V input range with +5 V/−5 V supplies On-chip terminations at both input pins Resistor-programmable hysteresis Differential latch control Power supply rejection > 70 dB

Multichannel ISM Band FSK/GFSK/OOK/GOOK/ASK Transmitter Features: Single-chip, low power UHF transmitter 75 MHz to 1 GHz frequency operation Multichannel operation using fractional-N PLL 2.3 V to 3.6 V operation On-board regulator Programmable output power −16 dBm to +14 dBm, 0.4 dB steps Data rates: dc to 179.2 kbps Low current consumption 868 MHz, 10 dBm, 21 mA 433 MHz, 10 dBm, 17 mA 315 MHz, 0 dBm, 10 mA Programmable low battery voltage indicator 24-lead TSSOP

I2C CMOS 8 10 Unbuffered Analog Switch Array with Dual/Single Supplies Features: I2C-compatible Interface 3.4 MHz High Speed I2C Option 32-lead LFCSP_VQ (5 mm × 5 mm) Double-buffered Input Logic Simultaneous Update of Multiple Switches Up to 300 MHz Bandwidth Fully Specified at Dual ±5 V/single +12 V Operation On Resistance 35 Ω Maximum Low Quiescent Current < 20 μA

SPI Interface, 1.5 RON, 15 V/+12 V, Quad SPST Switch, Mux Configurable Features: SPI interface with error detection Includes CRC, invalid read/write address, and SCLK count error detection Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and Mode 3 interface compatible Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations 1.5 typical on resistance at 25°C 0.3 typical on resistance flatness at 25°C 0.1 typical on resistance match between channels at 25°C VSS to VDD analog signal range Fully specified at ±15 V, ±5 V, and +12 V 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V 24-lead LFCSP