High Speed, Low Noise Video Op Amp Features:High Speed 120 MHz bandwidth, gain = 1230 V/s slew rate90 ns settling time to 0.1%Ideal for video applications0.02% differential gain0.04 differential phaseLow noise1.7 nV/Hz input voltage noise1.5 pA/Hz input current noiseExcellent dc precision1 mV maximum input offset voltage (over temperature)0.3 V/C input offset driftFlexible operationSpecified for 5 V to 15 V operation3 V output swing into a 150 loadExternal compensation for gains 1 to 205 mA supply currentAvailable in tape and reel in accordance with EIA-481A standard

DIVIDERS 20V/US TO-100-10; No. of Multipliers / Dividers:1; No. of Amplifiers:4 Amplifier; Supply Voltage Min:8V; Supply Voltage Max:18V; Slew Rate:20V/µs; Digital IC Case:TO-100; No. of Pins:10Pins; Operating Temperature Min:-25°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:AD632 Series; MSL:-; SVHC:No SVHC (20-Jun-2016); No. of Amplifiers:4Amplifiers

Low Cost Analog Multiplier Features: 4-quadrant multiplication Low cost, 8-lead SOIC and PDIP packages Complete—no external components required Laser-trimmed accuracy and stability Total error within 2% of full scale Differential high impedance X and Y inputs High impedance unity-gain summing input Laser-trimmed 10 V scaling referenceSupports defense and aerospace applications (AQEC standard) Download AD633-EP data sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/18603 DSCC Drawing Number

Single Channel, 16-Bit, Current Source & Voltage Output DAC, HART Connectivity Features: 16-bit resolution and monotonicity Current output ranges: 4 mA to 20 mA, 0 mA to 20 mA, or 0 mA to 24 mA ±0.01% FSR typical total unadjusted error (TUE) ±3 ppm FSR/°C output drift Voltage output ranges: 0 V to 5 V, 0 V to 10 V, ±5 V, or ±10 V 10% overrange ±0.01% FSR typical TUE ±2 ppm FSR/°C output drift Flexible serial digital interface On-chip output fault detection On-chip reference: 10 ppm/°C maximum Optional regulated DVCC output Asynchronous clear function Power supply range AVDD: 10.8 V to 40 V AVSS: −26.4 V to −3 V/0 V Current loop compliance voltage: AVDD – 2.5 V Temperature range: −40°C to +105°C TSSOP and LFCSP packages

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Single-Supply, Rail-to-Rail, Low Power FET-Input Op Amp Features: True single-supply operation Output swings rail-to-rail Input voltage range extends below ground Single-supply capability from 5 V to 36 V Dual-supply capability from ±2.5 V to ±18 V  Excellent load drive Capacitive load drive up to 350 pF Minimum output current of 15 mA  Excellent ac performance for low power 800 μA maximum quiescent current Unity-gain bandwidth: 1.8 MHz Slew rate of 3 V/μs  Excellent dc performance 800 μV maximum input offset voltage 2 μV/°C typical offset voltage drift 25 pA maximum input bias current  Low noise: 13 nV/√Hz @ 10 kHz