ADSP-BF561 EZ-KIT Lite® Blackfin® Blackfin® DSP Embedded Evaluation Board

ADSP-BF707 BLIP Blackfin® DSP Embedded Evaluation Board

PWM PROBING BOARD, ARM, CORTEX-M4;

20 V, 500 mA, Low Noise LDO Regulator with Soft Start Features: Input voltage range: 3.3 V to 20 V Maximum output current: 500 mA Low noise: 15 μV rms for fixed output versions PSRR performance of 60 dB at 10 kHz, VOUT = 3.3 V Reverse current protection Low dropout voltage: 350 mV at 500 mA Initial accuracy: ±0.8% Accuracy over line, load, and temperature −2% to +1%, TJ = −40°C to +125°C −1.25% to +1%, TJ = 0°C to +85°C Low quiescent current: 900 μA at VIN = 10 V, IOUT = 500 mA Low shutdown current: <50 μA at VIN = 12 V, stable with small 1 μF ceramic output capacitor 3 fixed output voltage options: 1.8, 3.3 V and 5 V Adjustable output from 1.22 V to 19 V Programmable soft start for inrush current control Foldback current-limit and thermal overload protection User programmable precision UVLO/enable Power-good indicator 8-lead LFCSP and 8-lead SOIC packages

Power Management IC Development Tools LTC4121EUD Demo Board - 400mA Synchronou

Non-Isolated PoL Module DC DC Converter 2 Output 0.6 ~ 5.5V 0.6 ~ 5.5V 2.5A, 2.5A 3.6V - 20V Input

Analogue Switch ICs SPST CMOS Analog Switch

Evaluation Board, Spdt Switch Rohs Compliant: Yes |Analog Devices EV1HMC232ALP4

Analog to Digital Converters - ADC 20-Bit, 40 MSPS SAR ADC

Analog Devices Inc. AD4080 Differential SAR ADCs

Features:

• High performance
  
  • Throughput of 40MSPS, 46.25ns conversion latency
  • INL of ±4ppm (typical), ±8ppm (maximum)
  • SNR/THD
    
    • 93.6dB (typical)/-110dB (typical) at fIN = 1kHz
    • 93.5dB (typical)/-104dB (typical) at fIN = 1MHz
  • Noise spectral density at -167.6dBFS/Hz
  • 20-bit resolution, no missing codes
• Low power
  
  • 79.3mW typical at 40MSPS with -0.5dBFS sine-wave input
• Easy Drive, fully differential Input
  
  • 6Vp-p differential input range
  • Continuous signal acquisition
  • Linearized, 5μA/MSPS input current
• Integrated, low-drift reference buffer and decoupling
• Integrated VCM generation
• Digital features and data interface
  
  • Conversion result FIFO, 16K sample depth
  • Digital averaging filter with up to 210 decimation
• SPI configuration
• Configurable data interface
  
  • Single lane, DDR, serial LVDS, 800MBPS per lane
  • Dual lane, DDR, serial LVDS, 400MBPS per lane
  • Single/quad lane SPI data interface
• Package
  
  • 49-ball, 5mm x 5mm CSP_BGA, 0.65mm pitch
  • Integrated supply decoupling capacitors
• Operating temperature range of -40°C to +85°C

Applications:

• Digital imaging
• Cell analysis
• Spectroscopy
• Automated test equipment
• High speed data acquisition
• Digital control loops, hardware in the loop
• Power quality analysis
• Source measurement units
• Electron and x-ray microscopy
• Radar level measurement
• Nondestructive test
• Predictive maintenance and structural health

OP-AMP, 10.4MHZ, 6 TO 40V, MSOP-8;