The AD585 is a complete monolithic sample-and-hold circuit consisting of a high performance operational amplifier in series with an ultralow leakage analog switch and a FET input integrating amplifier. An internal holding capacitor and matched applications resistors have been provided for high precision and applications flexibility.The performance of the AD585 makes it ideal for high speed 10- and 12-bit data acquisition systems, where fast acquisition time, low sample-to-hold offset, and low droop are critical. The AD585 can acquire a signal to ±0.01% in 3 µs maximum, and then hold that signal with a maximum sample-to-hold offset of 3 mV and less than 1 mV/ms droop, using the on-chip hold capacitor. If lower droop is required, it is possible to add a larger external hold capacitor.The high speed analog switch used in the AD585 exhibits aperture jitter of 0.5 ns, enabling the device to sample full scale (20 V peak-to-peak) signals at frequencies up to 78 kHz with 12-bit precision.The AD585 can be used with any user-defined feedback net-work to provide any desired gain in the sample mode. On-chip precision thin-film resistors can be used to provide gains of +1, -1, or +2. Output impedance in the hold mode is sufficiently low to maintain an accurate output signal even when driving the dynamic load presented by a successive-approximation A/D converter. However, the output is protected against damage from accidental short circuits.The control signal for the HOLD command can be either active high or active low. The differential HOLD signal is compatible with all logic families, if a suitable reference level is provided. An on-chip TTL reference level is provided for TTL compatibility.The AD585 is available in three performance grades. The JP grade is specified for the 0°C to +70°C commercial temperature range and packaged in a 20-pin PLCC. The AQ grade is specified for the -25°C to +85°C industrial temperature range and is packaged in a 14-pin cerdip. The SQ and SE grades are specified for the -55°C to +125°C military temperature range and are packaged in a 14-pin cerdip and 20-pin LCC.

EVALUATION BOARD, SHARC AUDIO PROCESSOR;

FAILSAFE SWITCH, SPST, 6GHZ, SOT-26;

FAILSAFE SWITCH, SPST, 6GHZ, SOT-26;

DIGITAL ATTENUATOR, 0-6GHZ, QFN-EP;

VCO, W/HALF FREQ O/P, 7.8-8.8GHZ, QFN32;

The SSM2135 dual audio operational amplifier permits excel-lent performance in portable or low power audio systems, with an operating supply range of 4 V to 36 V or ±2 V to ±18 V. The unity-gain stable device has very low voltage noise of 5.2 nV/√Hz, and total harmonic distortion plus noise below 0.01% over normal signal levels and loads. Such characteristics are enhanced by wide output swing and load drive capability. A unique output stage1 permits output swing approaching the rail under moderate load conditions. Under severe loading, the SSM2135 still maintains a wide output swing with ultralow distortion. Particularly well suited for computer audio systems and portable digital audio units, the SSM2135 can perform preamplification, headphone and speaker driving, and balanced line driving and receiving. Additionally, the device is ideal for input signal conditioning in single-supply, Σ-Δ, analog-to-digital converter subsystems such as the AD1877. The SSM2135 makes an ideal single-supply stereo output amplifier for audio digital-to-analog converters (DACs) because of its low noise and distortion.The SSM2135 is available in an 8-lead plastic SOIC package and is guaranteed for operation over the extended industrial temperature range of −40°C to +85°C.

Precision 1.7 g, 5 g, 18 g Dual-Axis iMEMS Accelerometer Features: High performance dual-axis accelerometer on a single IC chip 5 mm × 5 mm × 2 mm LCC package 1 mg resolution at 60 Hz Low power: 700 µA at VS = 5 V (typical) High zero g bias stability High sensitivity accuracy –40°C to +125°C temperature range X and Y axes aligned to within 0.1° (typical) BW adjustment with a single capacitor Single-supply operation 3500 g shock survival RoHS-compliant Compatible with Sn/Pb- and Pb-free solder processes

Single-Supply, Multichannel, 125 kSPS, 24-Bit, Sigma-Delta ADC with 10 V Inputs Features:24-bit ADC with integrated AFEFast and flexible output rate: 2.5 SPS to 125 kSPSChannel scan data rate of 24,845 SPS per channel (40.25 s settling)85 dB common mode rejection of 50 Hz and 60 Hz at 20 SPS per channel10 V inputs, either 8 differential or 16 single-endedVIN pin absolute maximum rating 65 VAbsolute input pin voltage up to 20 VMinimum 1 M impedanceOn-chip 2.5 V reference0.12% initial accuracy at 25C, 5 ppm/C (typical) driftInternal or external clockPower suppliesAVDD = 4.5 V to 5.5 VIOVDD = 2 V to 5.5 VTotal current consumption AVDD + IOVDD (IDD) = 10.4 mATemperature range: 40C to +105C3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)SPI, QSPI, MICROWIRE, and DSP compatible

Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers Features: Fast and flexible output rate: 1.25 SPS to 31.25 kSPS Channel scan data rate of 6.21 kSPS/channel (161 µs settling) Performance specifications 17.2 noise free bits at 31.25 kSPS 24 noise free bits at 5 SPS INL: ±2 ppm of FSR 85 dB rejection of 50 Hz and 60 Hz with 50 ms settling User configurable input channels 2 fully differential channels or 4 single-ended channels Crosspoint multiplexer On-chip 2.5 V reference (±2 ppm/°C drift) True rail-to-rail analog and reference input buffers Internal or external clock See data sheet for additional features