ADM6346 - UltraLow Power, Microprocessor RESET Circuit

Ultralow Power, 3-Lead, SOT-23, Microprocessor Reset Circuit, Active-Low Open-Drain Output, 1 A Supply Current Features: Ultralow supply current of 1 μA maximum (ADM6326/ADM6328) Accurate monitoring of 2.5 V, 3 V, 3.3 V, and 5 V rails Reset thresholds available in increments from 2.2 V to 4.63 V Glitch immunity from negative-going VCC transients 2 reset output options Push-pull RESET (ADM6326/ADM6346) Open-drain RESET (ADM6328/ADM6348) Minimum reset timeout of 100 ms Operating temperature range of −40°C to +85°C 3-lead SOT-23 package

Ethernet Clock Generator, 10 Clock Outputs Features: Fully integrated VCO/PLL core 0.17 ps rms jitter from 1.875 MHz to 20 MHz at 156.25 MHz 0.41 ps rms jitter from 12 kHz to 20 MHz at 125 MHz Input crystal or clock frequency of 25 MHz Preset divide ratios for 156.25 MHz, 33.33 MHz,100 MHz, and 125 MHz Choice of LVPECL or LVDS output format See datasheet for additional features

500 kSPS, 2-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC Features: 12-bit plus sign SAR ADC True bipolar input ranges Software-selectable input ranges: ±10 V, ±5 V, ±2.5 V, 0 V to +10 V 2 analog input channels with channel sequencer Single-ended, true differential, and pseudo differential analog input capability 500 kSPS throughput rate High analog input impedance Low power: 18 mW Full power signal bandwidth: 22 MHz Internal 2.5 V reference High speed serial interface See data sheet for additional features

OP293 - Precision, Micropower Operational Amplifier

Dual/Quad Rail-to-Rail Operational Amplifiers

Dual, 12-Bit, 80 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter Features: 1.8 V supply operation Low power: 115 mW per channel at 125 MSPS with scalable power options SNR = 71 dBFS (to Nyquist) SFDR = 93 dBc at 70 MHz DNL = −0.1 LSB to +0.2 LSB (typical); INL = ±0.4 LSB (typical) Serial LVDS (ANSI-644, default) and low power, reduced range option (similar to IEEE 1596.3) 650 MHz full power analog bandwidth 2 V p-p input voltage range Serial port control Full chip and individual channel power-down modes Flexible bit orientation Built-in and custom digital test pattern generation Clock divider Programmable output clock and data alignment Programmable output resolution Standby mode

Quad 16-/14-/12-Bit nanoDAC+ with 2 ppm/C Reference, I2C Interface

Quad 14-Bit nanoDAC+ with 2 ppm/C Reference, I2C Interface Features: High relative accuracy (INL): ±2 LSB maximum at 16 bits Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility Low glitch: 0.5 nV-sec 400 kHz I2C-compatible serial interface Low power: 3.3 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range

Quad 16-/14-/12-Bit nanoDAC+ with 2 ppm/C Reference, I2C Interface