LC2MOS Complete, High Speed 12-Bit ADC Features:12-Bit Resolution and AccuracyFast Conversion Time- AD7572XX06: 5 µs- AD7572XX12: 12.5 µsComplete with On-Chip ReferenceFast Bus Access Time: 90 nsLow Power: 135 mWSmall, 0.3', 24-Pin Package and28-Terminal Surface Mount Packages

CMOS, 5s 8-Bit Sampling ADC Features: Fast Conversion Time: 5 µs On-Chip Track/Hold Low Total Unadjusted Error: 1 LSB Full Power Signal Bandwidth: 50 kHz Single +5 V Supply 100 ns Data Access Time Low Power (15 mW typ) Low Cost Standard 18-Lead DlPs or 20-Terminal Surface Mount Packages

8-Bit Analog-to-Digital Converter Features: 8-Bit Resolution No Missed Codes over Full Temperature Range Fast Conversion Time: 15 µs Interfaces to µP like RAM, ROM of Slow - Memory Low Power Dissipation: 30 mW Ratiometric Capability Single +5V Supply Low Cost Internal Comparator and Clock Oscillator

16-Bit, 100 kSPS PulSAR Unipolar ADC with Ref Features: 2.5 V Internal Reference:  Typical Drift 3 ppm/°C - Guaranteed Max Drift: 15 ppm/°C Throughput: 100 kSPS INL: ±2.5 LSB Max (±0.0038% of Full Scale) 16 Bits Resolution with No Missing Codes S/(N+D): 88 dB max @ 20 kHz; THD: -96 dB max @ 20 kHz Analog Input Voltage Range: 0 V to 2.5 V No Pipeline Delay Parallel and Serial 5 V/3 V Interface SPI®/QSPI™/MICROWIRE™/DSP Compatible Single 5 V Supply Operation Package: 48-Lead Quad Flat Pack (LQFP) 48-Lead Chip Scale Package (LFCSP) Pin-to-Pin Compatible with  PulSAR® ADCs See datasheet for additional features

20-Bit A/D Converter Features: Monolithic 16-Bit ADC 0.0015% Linearity Error On-Chip Self-Calibration Circuitry Programmable Low-Pass Filter 0.1 Hz to 10 Hz Corner Frequency 0 V to +2.5 V or 2.5 V Analog Input Range 4 kSPS Output Data Rate Flexible Serial Interface Ultralow Power

CMOS, 24-Bit Sigma-Delta, Signal Conditioning ADC with Matched RTD Excitation Currents Features: Charge-Balancing ADC 24 Bits, No Missing Codes ±0.0015% Nonlinearity 2-Channel Programmable Gain Front End Gains from 1 to 128 1 Differential Input 1 Single-Ended Input Low-Pass Filter with Programmable Filter Cutoffs Ability to Read/Write Calibration Coefficients RTD Excitation Current Sources Bidirectional Microcontroller Serial Interface Internal/External Reference Option Single- or Dual-Supply Operation Low Power (25 mW typ) with Power-Down Mode (7 mW typ)

10-Bit, 8-Channel, 350 kSPS, Serial A/D Converter Features: 10-Bit ADC with 2.3 µs Conversion Time The AD7812 has Eight Single-Ended Inputs that Can Be Configured as Seven Pseudo Differential Inputs with Respect to a Common, or as Four Independent Pseudo Differential Channels Onboard Track and Hold Onboard Reference 2.5 V ± 2.5% Operating Supply Range: 2.7 V to 5.5 V Specifications at 2.7 V-3.6 V and 5 V ± 10% DSP-/Microcontroller-Compatible Serial Interface High Speed Sampling and Automatic Power-Down Modes Package Address Pin on the AD7811 and AD7812 Allows Sharing of Serial Bus in Multipackage Applications Input Signal Range: 0 V to VREF Reference Input Range: 1.2 V to VDD

16-Bit 160 MSPS 2x/4x/8x Interpolating Dual TxDAC+ D/A Converter Features: 16-bit resolution, 160 MSPS/400 MSPS input/output data rate Selectable 2×/4×/8× interpolating filter Programmable channel gain and offset adjustment fS/4, fS/8 digital quadrature modulation capability Fully compatible SPI® port Direct IF transmission mode for 70 MHz + IFs Enables image rejection architecture See datasheet for additional features

Dual, 12-Bit, 1 GSPS, Digital-to-Analog Converter Features: Low power: 1.0 W @ 1 GSPS, 600 mW @ 500 MSPS, full operating conditions Single carrier W-CDMA ACLR = 80 dBc @ 80 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Novel 2×, 4×, and 8× interpolator/coarse complex modulator allows carrier placement anywhere in DAC bandwidth Auxiliary DACs allow control of external VGA and offset control Multiple chip synchronization interface High performance, low noise PLL clock multiplier Digital inverse sinc filter 100-lead, exposed paddle TQFP

10-/12-Bit Mixed Signal Front-End (MxFE) Processor for Broadband Communications Features: Dual 10-/12-Bit, 64 MSPS Sampling A/D Converter with Independent Reference, Input Buffers, Programmable Gain Amplifiers (PGA), Decimation Filters and a Digital Hilbert Block Dual 12-/14-bit, 128 MSPS D/A Converter with Digital Hilbert and Interpolation Filters, Digital I/Q or Real-Signal Up-Converters, By passable Digital Up-Converters A Versatile Mixed Signal Front-End Processor with Dual Receive and Dual Transmit Channels Internal Clock Distribution Block including a Phase-Locked Loop and Timing Generation circuitry Programmable Output Clocks, SPI Port, Programmable Sigma Delta Outputs, Auxiliary DAC outputs, Auxiliary ADC inputs