The ADAU1328 is a high performance, single-chip codec that provides two analog-to-digital converters (ADCs) with differential input and eight digital-to-analog converters (DACs) with single-ended output using the Analog Devices, Inc. patented multibit sigma-delta (Σ-Δ) architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1328 operates from 3.3 V digital and analog supplies. The ADAU1328 is available in a 48-lead (single-ended output) LQFP. Other members of this family include a differential DAC output version.The ADAU1328 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR clock or from an external crystal, the ADAU1328 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The digital-to-analog and analog-to-digital converters are designed using the latest ADI continuous time architectures to further minimize EMI. By using 3.3 V supplies, power consumption is minimized, further reducing emissions.APPLICATIONS Home theater systems Set-top boxes Digital audio effects processors

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase- locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A simple 3-wire interface controls all on-chip registers. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.Applications CATV equipment Base stations for mobile radio (GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA, W-CDMA) Wireless handsets (GSM, PCS, DCS, CDMA, W-CDMA) Wireless LANs, PMR Communications test equipment

The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a Σ-Δ-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment

The ADG1204 is a complementary metal-oxide semiconductor(CMOS) analog multiplexer, comprising four single channelsdesigned on an iCMOS (industrial CMOS) process. iCMOS® is amodular manufacturing process that combines high voltage CMOSand bipolar technologies. It enables the development of a widerange of high performance analog ICs capable of 33 V operationin a footprint that no previous generation of high voltage deviceshas been able to achieve. Unlike analog ICs using conventionalCMOS processes, iCMOS components can tolerate high supplyvoltages while providing increased performance, dramaticallylower power consumption, and reduced package size.The ultralow capacitance and charge injection of this multiplexermakes it an ideal solution for data acquisition and sample-andholdapplications, where low glitch and fast settling are required.Fast switching speed coupled with high signal bandwidth makesthe device suitable for video signal switching. iCMOS constructionensures ultralow power dissipation, making the device ideallysuited for portable and battery-powered instruments.The ADG1204 switches one of four inputs to a common output, D,as determined by the 3-bit binary address lines: A0, A1, and EN.Logic 0 on the EN pin disables the device. Each switch conductsequally well in both directions when on and has an input signalrange that extends to the supplies. In the off condition, signallevels up to the supplies are blocked. All switches exhibit break-before-makeswitching action.Product Highlights 1. 1.5 pF off capacitance (±15 V supply). <1 pC charge injection. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <0.03 μW. 14-lead TSSOP and 12-lead, 3 mm × 3 mm LFCSP packages.Applications Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

The ADG1204 is a complementary metal-oxide semiconductor(CMOS) analog multiplexer, comprising four single channelsdesigned on an iCMOS (industrial CMOS) process. iCMOS® is amodular manufacturing process that combines high voltage CMOSand bipolar technologies. It enables the development of a widerange of high performance analog ICs capable of 33 V operationin a footprint that no previous generation of high voltage deviceshas been able to achieve. Unlike analog ICs using conventionalCMOS processes, iCMOS components can tolerate high supplyvoltages while providing increased performance, dramaticallylower power consumption, and reduced package size.The ultralow capacitance and charge injection of this multiplexermakes it an ideal solution for data acquisition and sample-andholdapplications, where low glitch and fast settling are required.Fast switching speed coupled with high signal bandwidth makesthe device suitable for video signal switching. iCMOS constructionensures ultralow power dissipation, making the device ideallysuited for portable and battery-powered instruments.The ADG1204 switches one of four inputs to a common output, D,as determined by the 3-bit binary address lines: A0, A1, and EN.Logic 0 on the EN pin disables the device. Each switch conductsequally well in both directions when on and has an input signalrange that extends to the supplies. In the off condition, signallevels up to the supplies are blocked. All switches exhibit break-before-makeswitching action.Product Highlights 1. 1.5 pF off capacitance (±15 V supply). <1 pC charge injection. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <0.03 μW. 14-lead TSSOP and 12-lead, 3 mm × 3 mm LFCSP packages.Applications Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

The ADG1206 and ADG1207 are monolithic iCMOS® analogmultiplexers comprising sixteen single channels and eightdifferential channels, respectively. The ADG1206 switches oneof sixteen inputs to a common output, as determined by the4-bit binary address lines A0, A1, A2, and A3. The ADG1207switches one of eight differential inputs to a common differentialoutput, as determined by the 3-bit binary address lines A0, A1,and A2. An EN input on both devices is used to enable or disablethe device. When disabled, all channels are switched off. Whenon, each channel conducts equally well in both directions andhas an input signal range that extends to the supplies.The industrial CMOS (iCMOS) modular manufacturingprocess combines high voltage complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables thedevelopment of a wide range of high performance analog ICscapable of 33 V operation in a footprint that no other generationof high voltage devices has been able to achieve. Unlike analogICs using conventional CMOS processes, iCMOS componentscan tolerate high supply voltages while providing increasedperformance, dramatically lower power consumption, andreduced package size. The ultralow capacitance and exceptionally low charge injectionof these multiplexers make them ideal solutions for data acquisitionand sample-and-hold applications, where low glitch and fastsettling are required. There is minimumcharge injection over the entire signal range of the device.iCMOS construction also ensures ultralow power dissipation,making the devices ideally suited for portable and battery-poweredinstruments.Applications Audio and video routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Communication systems