The high performance 16/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the dynamic power management (DPM) functionality allow system designers a flexible platform to address a wide range of portable applications, including consumer, communications and industrial/instrumentation.With the combination of peripherals which enable glue-less connectivity to networked devices such as Ethernet or WiFi 802.11 a/b/g modules and power efficient signal processing, the ADSP-BF527 is well suited to IP connected applications such as VoIP Phone or IP Camera.The VoIP challenge to the embedded-system designer is to choose a processing solution that is cost-effective, easy to deploy and scaleable in performance across market spaces. A “sweet spot” embedded-solution approach is to design with a platform that can implement a low channel count basic VoIP solution, yet retain sufficient capacity for value added capabilities and services – such as video, music, imaging and system control. Unlike traditional VoIP embedded solutions that utilize two processor cores to provide VoIP functionality, the ADSP-BF527 provides a convergent solution in a unified core architecture that allows voice and video signal processing concurrent with RISC MCU processing to handle network and user-interface demands. This unique ability to offer full VoIP functionality on a single convergent processor provides for a unified software development environment, faster system debugging and deployment, and lower overall system cost.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF527 provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.

The ADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors are members of the Blackfin® family of products, incorporating the Analog Devices, Inc./Intel Micro Signal Architecture (MSA). Blackfin processors combine a dual-MAC state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single instruction, multiple data (SIMD) multimedia capabilities into a single instruction set architecture. The ADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors are completely code and pin-compatible, differing only with respect to their performance and on-chip memory. Specific performance and memory configurations are shown in Table 1.PERIPHERALS Parallel peripheral interface PPI, supporting ITU-R 656 video data formats 2 dual-channel, full duplex synchronous serial ports, supporting eight stereo I2S channels 2 memory-to-memory DMAs 8 peripheral DMAs SPI-compatible port Three 32-bit timer/counters with PWM support Real-time clock and watchdog timer 32-bit core timer Up to 16 general-purpose I/O pins (GPIO) UART with support for IrDA Event handler Debug/JTAG interface On-chip PLL capable of frequency multiplication

The Blackfin® Processor family expands the performance envelope with the ADSP-BF561. With two high performance Blackfin Processor cores, flexible cache architecture, enhanced DMA subsystem, and Dynamic Power Management (DPM) functionality, the ADSP-BF561 can support complex control and signal processing tasks while maintaining extremely high datathroughput.The ADSP-BF561 is a functional extension of the popular Blackfin Processor family and is ideally suited for a broad range of industrial, instrumentation, medical, and consumer appliance applications—allowing for scalability based upon the required data bandwidth and mix of control, plus signal processing needed in the end product.High-Level of Integration 328 KBytes of on-chip memory configured as: 32 KBytes of L1 instruction memory SRAM/Cache per core 64 KBytes of L1 data memory SRAM/Cache per core 4 KBytes of L1 scratchpad memory per core 128 KBytes of low-latency shared L2 memory 32-bit Memory Controller providing glueless connection to multiple banks of SDRAM, SRAM, Flash or ROM. Two Parallel Peripheral Interfaces Units supporting ITU-R 656 video data formats. Two dual-channel, full-duplex, synchronous serial ports supporting eight stereo I2S channels. Dual 16 Channel DMA Controllers, supporting one and two-dimension transfers. SPI-compatible Port. UART with support for IrDA®. 12 timer/counters supporting PWM, pulsewidth and event count modes. 48 Programmable Flags/General Purpose I/O. Event Handler. Dual Watchdog timers. PLL capable of 1x to 63x frequency multiplication. 256-ball Mini-BGA and 297-ball Sparse PBGA packages.

The Blackfin® Processor family has been expanded to address the need for embedded Controller Area Network (CAN) connectivity. This connectivity is powerful when utilized in conjunction with the high performance 16-/32-bit Blackfin embedded processor core,the flexible cache architecture, the enhanced DMA subsystem, and the Dynamic Power Management (DPM) functionality. System designers can take advantage of the combined control and signal processing capabilities of the processor core across a wide range of end applications.The ADSP-BF534 is a functional extension of the popularADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors and is ideally suited for a variety of CAN networked applications. The ADSP-BF534 offers a high performance series for embedded applications such as automotive safety, automotive body control, automotive driver assistance, automotive entertainment, and industrial factory automation. This processor is ideally suited for a broad range of industrial, instrumentation, and medicalapplications that allow for scalability and CAN network connectivity that utilize a mix of control, plus signal processing in the end product for robust systems

The Blackfin® Processor family has been expanded to address the need for embedded Controller Area Network (CAN) connectivity. This connectivity is powerful when utilized in conjunction with the high performance 16-/32-bit Blackfin embedded processor core,the flexible cache architecture, the enhanced DMA subsystem, and the Dynamic Power Management (DPM) functionality. System designers can take advantage of the combined control and signal processing capabilities of the processor core across a wide range of end applications.The ADSP-BF534 is a functional extension of the popularADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors and is ideally suited for a variety of CAN networked applications. The ADSP-BF534 offers a high performance series for embedded applications such as automotive safety, automotive body control, automotive driver assistance, automotive entertainment, and industrial factory automation. This processor is ideally suited for a broad range of industrial, instrumentation, and medicalapplications that allow for scalability and CAN network connectivity that utilize a mix of control, plus signal processing in the end product for robust systems

The Blackfin® Processor family has been expanded to address the ever-increasing need for pervasive embedded network connectivity. This connectivity is powerful when utilized in conjunction with the high performance 16-/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the Dynamic Power Management (DPM) functionality. System designers can take advantage of the combined control and signal processing capabilities of the processor core across a wide range of end applications through the scalability of the pin and code compatibility of these new family members. The ADSP-BF536 and ADSP-BF537 are a functional extension of the popular ADSP-BF531 / ADSP-BF532 / ADSP-BF533 processors, and they are ideally suited for a variety of networked applications. The ADSP-BF537 is the higher performance series member, with more embedded memory enabling higher throughput needs for embedded applications suchas video security/surveillance and industrial-environment-based distributed control/factory automation applications. The ADSP-BF536 offers exceptional performance and is designed for low cost connected devices such as remote monitoring devices, VoIP, point-of-sale terminals, and biometrics/security applications. Both devices are ideally suited for a broadrange of industrial, instrumentation, medical, and consumer appliance applications— allowing for scalability based upon the required network bandwidth and mix of control, plus signal processing needed in the end product.

Metering Systems on a Chip - SoC Highly Integrated Power and Energy IC

Metering Systems on a Chip - SoC 8 Out Sgl Phase Pwr & Energy Msrmt IC

Metering Systems on a Chip - SoC 3-Phase Energy Meter I/C

The ADSP-21160M DSP is a SHARC processor that is optimized for applications such as telephony, medical imaging, radar/sonar electronics, communications, 3D graphics and imaging. The ADSP-21160M features a Single-Instruction-Multiple-Data (SIMD) architecture.Using two computational units (ALU, Barrel Shifter, MAC, Register files), the ADSP-21160M can have a five fold performance increase versus the ADSP-2106x on a range of DSP algorithms. It is code compatible with ADI's popular first generation ADSP-2106x SHARC DSPs. Like other SHARCs, the ADSP-21160M is a 32-bit processor that is optimized for high performance DSP applications. The ADSP-21160M includes an 80 MHz core for processing both 32-bit fixed-point and (32-bit, 40-bit) floating-point data types, a dual-ported 4 Mbit on-chip SRAM, an integrated I/O processor with multiprocessing support, and multiple internal busses to eliminate I/O bottlenecks.The ADSP-21160M is optimized for multiprocessing topologies; SHARC supports multiprocessing via link ports or an external port. In the diagram below, both cluster and link port multiprocessing is shown. Over the external port up to six 21160Ms may be connected together without any additional support logic. The arbitration for this shared bus is integrated on-chip. Each SHARC in the cluster has access to every SHARC's internal memory. Through the external port connection, optional external memory may be shared as well.The six link ports are another way to gluelessly connect a multiprocessing system. Both, the links and the cluster can be used simultaneously and systems with hundreds of SHARC DSPs can be developed using both peripherals.Maximize Speed, Minimize Size The ADSP-21160M is offered in a 27mm x 27mm 400-ball PBGA (Plastic Ball Grid Array) package 40% smaller than processors in this performance class.More Processing Per WattIn addition to small size and high performance, the 21160M's power dissipation enables new levels of MFLOPS per watt. The ADSP-21160M typical power dissipation is 2 watts, enabling 240 MFLOPS of performance per watt. This allows designers to use multiple processors on a PCI card within the PCI power limit of 25 watts. With eight 21160M DSPs, providing 480 MFLOPS each, a standard PCI card design can obtain 3.84 GFLOPS performance and leave 9 watts for other circuitry.The ADSP-21160M is supported by hundreds of readily available third-party hardware and software products and ADI's powerful VisualDSP++ development system, allowing for fast and easy development, debug and deployment.