The AD8197 is an HDMI™/DVI switch featuring equalized TMDS® inputs and pre-emphasized TMDS outputs, ideal for systems with long cable runs. Outputs can be set to a high impedance state to reduce the power dissipation and/or to allow the construction of larger arrays using the wire-OR technique. Flexible channel bundling modes (for both the TMDS channels and the auxiliary signals) allow the AD8197 to be configured as a 4:1 single HDMI/DVI link switch, a dual 8:1 switch, or a single 16:1 switch.The AD8197 is provided in a 100-lead LQFP, Pb-free, surface-mount package, specified to operate over the −40°C to +85°C temperature range. ul { margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:15px; padding-top:0px; padding-right:0px; padding-bottom:10px; padding-left:0px;} li { padding-top:0px; padding-right:0px; padding-bottom:5px; padding-left:0px; margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:0px;} ol { margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:25px; padding-top:0px; padding-right:0px; padding-bottom:10px; padding-left:0px;} li { padding-top:0px; padding-right:0px; padding-bottom:5px; padding-left:0px; margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:0px;}Product Highlights Supports data rates up to 2.25 Gbps, enabling 1080p deep color (12-bit color) HDMI formats, and greater than UXGA (1600 × 1200) DVI resolutions. Input cable equalizer enables use of long cables at the input (more than 20 meters of 24 AWG cable at 2.25 Gbps). Auxiliary switch routes a DDC bus and two additional signals for a single-chip, HDMI 1.3 receive-compliant solution.Applications Multiple input displays Projectors A/V receivers Set-top boxes Advanced television (HDTV) sets Data Sheet, Rev. 0, 1/07

The fourth generation of SHARC® Processors, which includes the ADSP-21469, offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting the latest surround-sound decoder algorithms. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.The ADSP-21469 offers the highest performance – 450 MHz/2700 MFLOPs -- within the fourth generation SHARC Processor family. This level of performance makes the ADSP-21469 particularly well suited to address the increasing requirements of the professional and automotive audio market segments. In addition to its higher core performance, the ADSP-21469 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to faster external memory by providing a glueless interface to 16-bit wide DDR2 SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The high performance 16/32-bit Blackfin embedded processor core, the flexible cache architecture, the enhanced DMA subsystem, and the dynamic power management (DPM) functionality allow system designers a flexible platform to address a wide range of portable applications, including consumer, communications and industrial/instrumentation.With the combination of peripherals which enable glue-less connectivity to networked devices such as Ethernet or WiFi 802.11 a/b/g modules and power efficient signal processing, the ADSP-BF526 is well suited to IP connected applications such as VoIP Phone or IP Camera.The VoIP challenge to the embedded-system designer is to choose a processing solution that is cost-effective, easy to deploy and scaleable in performance across market spaces. A “sweet spot” embedded-solution approach is to design with a platform that can implement a low channel count basic VoIP solution, yet retain sufficient capacity for value added capabilities and services – such as video, music, imaging and system control. Unlike traditional VoIP embedded solutions that utilize two processor cores to provide VoIP functionality, the ADSP-BF526 provides a convergent solution in a unified core architecture that allows voice and video signal processing concurrent with RISC MCU processing to handle network and user-interface demands. This unique ability to offer full VoIP functionality on a single convergent processor provides for a unified software development environment, faster system debugging and deployment, and lower overall system cost.IP protection has become a necessary part of today’s embedded computing applications. The ADSP-BF526 provides a security scheme which balances flexibility and upgradeability with performance through the inclusion of a firmware-based solution including OTP (One Time Programmable) memory to enable users to implement private keys for secure access to program code.

The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.The ADSP-21478 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21478 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21478 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.The ADSP-21479 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21479 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21479 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs. Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The SHARC ADSP-21489 is one of two new members of the fourth generation of SHARC® Processors that now includes the ADSP-21483, ADSP-21486, ADSP-21487, ADSP-21488, ADSP-21489 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting the latest surround-sound decoder algorithms. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.The ADSP-21489 offers the highest performance–450 MHz/2700 MFLOPs–in an LQFP package within the fourth generation SHARC Processor family. This level of performance makes the ADSP-21489 particularly well suited to address the automotive audio and industrial control segments. In addition to its high core performance, the ADSP-21489 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, IDP, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as SPI,UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The BF504 is a low cost member of the Blackfin portfolio of processors. With a 400 MHz core clock speed and a unique peripheral set including two three-phase PWM units, an ADC Control Module, two SPI’s, two SPORT’s, a CAN controller, a PPI, eight general purpose counters and a Removable Storage Interface, the BF504 is feature and cost optimized for compute intensive industrial and general purpose applications that do not require external memory or executable flash. The BF504 is offered in a low cost 12 × 12mm LFCSP package in commercial and industrial temperature grades.

The ADSP-21584 processor is part of the new, high-performance, power-efficient, real-time series that delivers greater than 24 giga-floating-point operations per second using two enhanced SHARC+® cores and advanced DSP accelerators (FFT, FIR, IIR). The ADSP-SC58x and ADSP-2158x series consume less than 2 watts, making the new processor line-up more than 5x more power efficient than previous SHARC products. This advantage provides industry leading digital signal processing performance for applications where thermal management sets the limit for power consumption, or where the higher costs and lower reliability of fans cannot be tolerated.  Applications include automotive, consumer and professional audio, multi-axis motor control, and energy distribution systems.The ADSP-2158x family is designed for applications where a DSP co-processor is exclusively needed and includes two SHARC+ cores and a peripheral set matched to a DSP core.  The new, code-compatible, enhanced SHARC+ core features clock-rate and power-efficiency improvements and adds instruction/data cache options, native double-precision floating-point support, and a number of other new instructions. Designed for low-power and using a low-leakage CMOS process, the ADSP-SC58x/2158x families deliver 500 MHz with 105°C environments in mind and provide a roadmap to future implementations at higher performance. More than 1.5 Mbytes of fast on-chip SRAM and a DDR3/2/LP interface aid efficient real-time performance while the memory subsystem includes major enhancements with advanced DMA engines for simultaneous data transfer.With software IP protection a growing industry security concern, ARM® TrustZone® security and an onboard crypto hardware accelerators are included. For applications where reliability is a critical requirement, memory parity and error-correction hardware provide higher data integrity. The overall integration and low-power features offered by the new ADSP-SC58x and ADSP-2158x series deliver significant BOM and board area savings and provide lower design complexity and reduced time to market for today’s complex applications.The ADSP-SC58x/2158x  is supported by ADI’s award winning Crosscore®  Embedded Studio development tool suite, providing design engineers with interactive, real-time development tools that help optimize their design and speed time to market.Additionally, ADI and Micrium have collaborated to offer µC/OS-II® & µC/OS-III® real-time kernels on SHARC+.The compatible ADSP-SC584 EZ-KIT-Lite development board and ICE-1000/2000 emulators facilitate the creation, test, and debug of advanced applications. Working in tandem with CrossCore Embedded Studio, the emulators provide state-of-the-art support for all JTAG-compliant Analog Devices processors now utilizing CoreSight™ from ARM.

The ADSP-21587 processor is part of the new, high-performance, power-efficient, real-time series that delivers greater than 24 giga-floating-point operations per second using two enhanced SHARC+® cores and advanced DSP accelerators (FFT, FIR, IIR). The ADSP-SC58x and ADSP-2158x series consume less than 2 watts, making the new processor line-up more than 5x more power efficient than previous SHARC products. This advantage provides industry leading digital signal processing performance for applications where thermal management sets the limit for power consumption, or where the higher costs and lower reliability of fans cannot be tolerated.  Applications include automotive, consumer and professional audio, multi-axis motor control, and energy distribution systems.The ADSP-2158x family is designed for applications where a DSP co-processor is exclusively needed and includes two SHARC+ cores and a peripheral set matched to a DSP core.  The new, code-compatible, enhanced SHARC+ core features clock-rate and power-efficiency improvements and adds instruction/data cache options, native double-precision floating-point support, and a number of other new instructions. Designed for low-power and using a low-leakage CMOS process, the ADSP-SC58x/2158x families deliver 500 MHz with 105°C environments in mind and provide a roadmap to future implementations at higher performance. More than 1.5 Mbytes of fast on-chip SRAM and up to two DDR3/2/LP interfaces aid efficient real-time performance while the memory subsystem includes major enhancements with advanced DMA engines for simultaneous data transfer.With software IP protection a growing industry security concern, ARM® TrustZone® security and an onboard crypto hardware accelerators are included. For applications where reliability is a critical requirement, memory parity and error-correction hardware provide higher data integrity. The overall integration and low-power features offered by the new ADSP-SC58x and ADSP-2158x series deliver significant BOM and board area savings and provide lower design complexity and reduced time to market for today’s complex applications.The ADSP-SC58x/2158x  is supported by ADI’s award winning Crosscore®  Embedded Studio development tool suite, providing design engineers with interactive, real-time development tools that help optimize their design and speed time to market.Additionally, ADI and Micrium have collaborated to offer µC/OS-II® & µC/OS-III® real-time kernels on SHARC+.The compatible ADSP-SC589 EZ-KIT-Lite development board and ICE-1000/2000 emulators facilitate the creation, test, and debug of advanced applications. Working in tandem with CrossCore Embedded Studio, the emulators provide state-of-the-art support for all JTAG-compliant Analog Devices processors now utilizing CoreSight™ from ARM.

The ADSP-SC589 processor is part of the new, high-performance, power-efficient, real-time series that delivers greater than 24 giga-floating-point operations per second using two enhanced SHARC+® cores and advanced DSP accelerators (FFT, FIR, IIR). The ADSP-SC58x and ADSP-2158x series consume less than 2 watts, making the new processor line-up more than 5x more power efficient than previous SHARC products. This advantage provides industry leading digital signal processing performance for applications where thermal management sets the limit for power consumption, or where the higher costs and lower reliability of fans cannot be tolerated.  Applications include automotive, consumer and professional audio, multi-axis motor control, and energy distribution systems.The ADSP-SC58x products complement the SHARC+ cores and DSP accelerators with the addition of an ARM® Cortex-A5 processor, with FPU and Neon® DSP extensions to handle additional real-time processing tasks and manage peripherals used to interface to time-critical data in audio, industrial closed-loop control, and industrial sensing applications. These interfaces includes Gigabit Ethernet, USB High-Speed, mobile storage (including SD/SDIO), PCI Express and a rich variety of other connectivity options for a flexible and simplified system design.The ADSP-2158x family is designed for applications where a DSP co-processor is exclusively needed and includes two SHARC+ cores and a peripheral set matched to a DSP core.The new, code-compatible, enhanced SHARC+ core features clock-rate and power-efficiency improvements and adds instruction/data cache options, native double-precision floating-point support, and a number of other new instructions. Designed for low-power and using a low-leakage CMOS process, the ADSP-SC58x/2158x families deliver 500 MHz with 105°C environments in mind and provide a roadmap to future implementations at higher performance. More than 1.8 Mbytes of fast on-chip SRAM and up to two DDR3/2/LP interfaces aid efficient real-time performance while the memory subsystem includes major enhancements with advanced DMA engines for simultaneous data transfer.With software IP protection a growing industry security concern, ARM® TrustZone® security and an onboard crypto hardware accelerators are included. For applications where reliability is a critical requirement, memory parity and error-correction hardware provide higher data integrity. The overall integration and low-power features offered by the new ADSP-SC58x and ADSP-2158x series deliver significant BOM and board area savings and provide lower design complexity and reduced time to market for today’s complex applications.The ADSP-SC58x/2158x  is supported by ADI’s award winning Crosscore®  Embedded Studio development tool suite, providing design engineers with interactive, real-time development tools that help optimize their design and speed time to market.Additionally, ADI and Micrium have collaborated to offer µC/OS-II® & µC/OS-III® real-time kernels on both SHARC+ and ARM Cortex-A5 cores, as well as Micrium’s USB Host, USB Device and file system stacks running on the ARM Cortex-A5.Analog Devices also provides the Linux Add-In for CrossCore Embedded Studio, a custom Linux board support package based on Buildroot, enabling customers interested in taking advantage of the communication stacks and application packages available for embedded Linux, running on the ARM Cortex-A5 core.  Target Linux availability is September 2015 and to request, please complete the software request form and specify “Linux SC58x Support' in the Additional Comments field.The ADSP-SC589 EZ-KIT-Lite development board and ICE-1000/2000 emulators facilitate the creation, test, and debug of advanced applications. Working in tandem with CrossCore Embedded Studio, the emulators provide state-of-the-art support for all JTAG-compliant Analog Devices processors now utilizing CoreSight™ from ARM.