Single-core SHARC+ (w/384KB L1), arm Cortex-A5, 1MB Shared L2, 10/100 Ethernet, 176-LQFP Features: Dual-enhanced SHARC+ high performance floating-point cores Up to 500 MHz per SHARC+ core Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed arm® Cortex-A5 core 500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle 32 kB L1 instruction cache with parity/32 kB L1 data cache with parity 256 kB L2 cache with parity Powerful DMA system On-chip memory protection Integrated safety features 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant Low system power across automotive temperature rangeMemory Large on-chip L2 SRAM with ECC protection, up to 1 MB One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devicesAdditional Features Security and Protection Cryptographic hardware accelerators Fast secure boot with IP protection Support for arm® TrustZone Accelerators FIR, IIR offload engines Qualified for automotive applications

Dual-core SHARC+ and Arm Cortex-A5 SOC, DDR, Ethernet, USB, 349-cspBGA Features:SHARC+ Core Infrastructure: 500 MHz (3.0 GFLOPS) per core 5Mbits/640KB L1 memory/core with parity Optional cache/SRAM mode 32-bit, 40-bit & 64-bit floating point supportARM Core Infrastructure: 450 MHz ARM Cortex-A5 (with Neon/FPU) 32kByte/32kByte L1 Instr./Data Cache 256kByte L2 CacheShared System Memory: 256KB L2 SRAM with ECC protectionUp to Two High Speed Memory Controllers: DDR3-900, DDR2-800 & LPDDR (16-bit)Advanced Hardware Accelerators: FFT/iFFT (20 GFLOPS, 5usec per 1K-pt FFT) FIR/IIR and SINC Filters, ASRC Security Crypto Engines with OTPPackaging: 19mm x 19mm BGA (0.8mm pitch) Commercial, Industrial & AutomotivePeripherals: Gigabit Ethernet MAC (RGMII) With IEEE-1588 & AVB support (QoS & clock recovery) USB2.0 HS OTG/Device Controllers (MAC/PHY) 2x CAN2.0 MLB 3/6-pin (Auto devices only) Up to 8x Full SPORT interfaces (w/ TDM & I2S modes) S/PDIF Tx/Rx, 8x ASRC pairs, PCG 2x Dual-SPI and 1x QuadSPI (w/ direct execution) 3x I2C and 3x UARTs (w/ Flow Control) Enhanced Parallel Peripheral Interface For video I/O or parallel converter interface 2x Link Ports (bi-directional, 8-bit, up to 150MB/sec) 3x Enhanced PWM, ADC Control Module (ACM) 8x GP Timer, 1x GP Counter, WDT and RTC Up to 80 GPIO (mux’ed w/ other interfaces) 8-ch 12-bit 1MSPS Housekeeping ADC Thermal Sensor

Dual-core SHARC+ and ARM Cortex-A5 SOC, dual DDR, 2xEthernet, 2xUSB, SDIO, PCIe, 529-cspBGA Features: 500 MHz (3.0 GFLOPS) per core 5Mbits/640KB L1 memory/core with parity Optional cache/SRAM mode 32-bit, 40-bit & 64-bit floating point supportARM Core Infrastructure: 500 MHz ARM Cortex-A5 (with Neon/FPU) 32kByte/32kByte L1 Instr./Data Cache 256kByte L2 CacheShared System Memory 256KB L2 SRAM with ECC protectionUp to Two High Speed Memory Controllers DDR3-900, DDR2-800 & LPDDR (16-bit)Advanced Hardware Accelerators FFT/iFFT (20 GFLOPS, 5usec per 1K-pt FFT) FIR/IIR and SINC Filters, ASRC Security Crypto Engines with OTPPackaging 19mm x 19mm BGA  (0.8mm pitch) Commercial, Industrial & Automotive 2x Ethernet MAC One Gigabit (RGMII) and one 10/100 (RMII) With IEEE-1588 & AVB support (QoS & clock recovery) 2x USB2.0 HS OTG/Device Controllers (MAC/PHY) 2x CAN2.0 SD/SDIO/MMC/eMMC (with SDXC support) PCIe2.0 (1 lane) (SC589 only) Up to 8 Full SPORT interfaces (w/ TDM & I2S modes) S/PDIF Tx/Rx, 8x ASRC pairs, PCG  2x Dual-SPI and 1x QuadSPI (w/ direct  execution) 3x I2C and 3x UARTs (w/ Flow Control) Enhanced Parallel Peripheral Interface For video I/O or parallel converter interface 2x Link Ports (bi-directional, 8-bit, up to 150MB/sec) 3x Enhanced PWM,  ADC Control Module (ACM) 8x GP Timer, 1x GP Counter, WDT and RTC Up to 102 GPIO (mux’ed w/ other interfaces) 8-ch 12-bit 1MSPS Housekeeping ADC Thermal Sensor

The ADSP-BF608 Blackfin processor is optimized for embedded vision and video analytics applications using a dual-core fixed-point DSP processor with a unique pipelined vision processor (PVP). The PVP is a set of functional blocks next to the Blackfin cores designed to accelerate image processing algorithms and reduce overall bandwidth requirements.Other features include a high performance enhanced infrastructure, large on-chip memory and a feature rich peripheral set with expanded connectivity options. In addition to these the ADSP-BF608 processor contains features for safety-critical applications, including a CRC for memory protection, Parity and ECC protection in the internal memory blocks and a Fault Management Unit.The ADSP-BF608 processor is ideal for many embedded vision applications such as automotive advanced driver assistance systems (ADAS), machine vision and robotics for industrial manufacturing systems, security and surveillance system analytics and bar code scanners.

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 200 MHz, as well as lowest power consumption at <53mW. Produced with a low-power and low-voltage design methodology, they provide world-class power management and performance.By integrating a rich set of industry-leading system peripherals and large on-chip memory, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 400 MHz, as well as lowest power consumption at <100mW. Produced with a low-power and low-voltage design methodology, they provide world-class power management and performance.By integrating a rich set of industry-leading system peripherals and large on-chip memory, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 400 MHz, as well as lowest power consumption at <100mW. Produced with a low-power and low-voltage design methodology, they provide world-class power management and performance.By integrating a rich set of industry-leading system peripherals and large on-chip memory, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 400 MHz, as well as lowest power consumption at <100mW. Produced with a low-power and low-voltage design methodology, they provide world-class power management and performance.By integrating a rich set of industry-leading system peripherals and large on-chip memory, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 400 MHz, as well as lowest power consumption at <100mW. Produced with a low-power and low-voltage design methodology, they provide world-class power management and performance.By integrating a rich set of industry-leading system peripherals and large on-chip memory, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

The ADSP-CM408F Mixed-Signal Control Processor integrates dual high precision 16 bit ADCs and an ARM® Cortex-M4TM processor core with floating-point unit operating at 240 MHz core clock frequency and integrating 384KB of SRAM memory, 2M byte of flash memory, and accelerators and peripherals optimized for motor control, photo-voltaic (PV) inverter control and other embedded control applications.